From 3aa33779df49d182b743373ae53b2397d7069ba5 Mon Sep 17 00:00:00 2001 From: jake Date: Sun, 9 Mar 2025 09:21:03 -0700 Subject: [PATCH] Added ADC_PoweOn() test +checks for the regedit of the power on bit in the register. --- tests/ADC/test_ADC.cpp | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/tests/ADC/test_ADC.cpp b/tests/ADC/test_ADC.cpp index f77fa03..e236a97 100644 --- a/tests/ADC/test_ADC.cpp +++ b/tests/ADC/test_ADC.cpp @@ -33,9 +33,41 @@ TEST(test_ADC, FirstTest) CHECK(true); } +TEST(test_ADC, ADC_PowerOnTest) +{ + // The ADCON bit should be high in the ADC_CTRL2 register. + mock().expectOneCall("RegEdit_SetBit") + .withPointerParameter("reg", (void *) &ADC1->CTLR2) + .withUnsignedIntParameter("bit_num", ADC_ADON); + + ADC_PowerOn(); +} TEST(test_ADC, ADC_SetupSetsRegisters) { + + //R32_GPIOD_CFGLR --> 0x40011400 + //DESC: PD port configuration register low + //RESET VALUE--> 0x44444444 + + //R32_GPIOD_INDR --> 0x40011408 + //DESC: PD port input data register + + //R32_GPIOD_BSHR --> 0x40011410 + //DESC: PD port set/reset register + + //R32_GPIOD_BCR --> 0x40011414 + //DESC: PD port reset register + + //R32_GPIOD_LCKR --> 0x40011418 + //DESC: PD port configuration lock register + + //Setup the ADC clock and divider. The internal HSI-XC is 24MHz. + + + //Setup PORTD pin(s) as analog input. + + /* //Clears control register A for ADC0