diff --git a/inc/ch32v003hw.h b/inc/ch32v003hw.h
index 24fb26c..f1e6a82 100644
--- a/inc/ch32v003hw.h
+++ b/inc/ch32v003hw.h
@@ -227,7 +227,7 @@ extern "C"
             {
                 __I uint16_t REVID;
                 __I uint16_t DEVID;
-            };
+            }s;
         };
     } INFO_TypeDef;
 
@@ -264,7 +264,7 @@ extern "C"
             GPIO_CFGLR_PIN_MODE_Typedef PIN5 : 4;
             GPIO_CFGLR_PIN_MODE_Typedef PIN6 : 4;
             GPIO_CFGLR_PIN_MODE_Typedef PIN7 : 4;
-        };
+        }s;
     } GPIO_CFGLR_t;
     typedef union
     {
@@ -280,7 +280,7 @@ extern "C"
             uint32_t IDR6 : 1;
             uint32_t IDR7 : 1;
             uint32_t      : 24;
-        };
+        }s;
     } GPIO_INDR_t;
     typedef union
     {
@@ -296,7 +296,7 @@ extern "C"
             uint32_t ODR6 : 1;
             uint32_t ODR7 : 1;
             uint32_t      : 24;
-        };
+        }s;
     } GPIO_OUTDR_t;
     typedef union
     {
@@ -321,7 +321,7 @@ extern "C"
             uint32_t BR6 : 1;
             uint32_t BR7 : 1;
             uint32_t     : 8;
-        };
+        }s;
     } GPIO_BSHR_t;
     typedef union
     {
@@ -337,7 +337,7 @@ extern "C"
             uint32_t BR6 : 1;
             uint32_t BR7 : 1;
             uint32_t     : 24;
-        };
+        }s;
     } GPIO_BCR_t;
     typedef union
     {
@@ -354,7 +354,7 @@ extern "C"
             uint32_t LCK7 : 1;
             uint32_t LCKK : 1;
             uint32_t      : 23;
-        };
+        }s;
     } GPIO_LCKR_t;
     typedef struct
     {
@@ -744,9 +744,9 @@ extern "C"
 #define OB ((OB_TypeDef *)OB_BASE)
 #define ESIG ((ESG_TypeDef *)ESIG_BASE)
 // Mentioned in ch32v30x_dbgmcu.c, may not work on all processors.
-#define INFO ((INFO_TypeDef *)INFO_BASE)
-#define EXTEN ((EXTEN_TypeDef *)EXTEN_BASE)
-#define EXTEND ((EXTEND_TypeDef *)EXTEN_BASE) // Alias to EXTEN
+//#define INFO ((INFO_TypeDef *)INFO_BASE)
+//#define EXTEN ((EXTEN_TypeDef *)EXTEN_BASE)
+//#define EXTEND ((EXTEND_TypeDef *)EXTEN_BASE) // Alias to EXTEN
 
 /******************************************************************************/
 /*                         Peripheral Registers Bits Definition               */