From a12d92fadd368d3f0d2e6da219c03561b9e097e2 Mon Sep 17 00:00:00 2001 From: jakegoodwin Date: Sun, 2 Apr 2023 17:51:26 -0700 Subject: [PATCH] init commit of avr assembly --- README.md | 0 build/prog.map | 754 ++++++++++++++++++++++++++++++++++ m328Pdef.inc | 979 +++++++++++++++++++++++++++++++++++++++++++++ makefile | 42 ++ src/main.s | 101 +++++ src/main.s.cof | 0 src/main.s.eep.hex | 1 + src/main.s.hex | 8 + src/main.s.obj | Bin 0 -> 440 bytes 9 files changed, 1885 insertions(+) create mode 100644 README.md create mode 100644 build/prog.map create mode 100644 m328Pdef.inc create mode 100644 makefile create mode 100644 src/main.s create mode 100644 src/main.s.cof create mode 100644 src/main.s.eep.hex create mode 100644 src/main.s.hex create mode 100644 src/main.s.obj diff --git a/README.md b/README.md new file mode 100644 index 0000000..e69de29 diff --git a/build/prog.map b/build/prog.map new file mode 100644 index 0000000..6334af5 --- /dev/null +++ b/build/prog.map @@ -0,0 +1,754 @@ +__DEFAULT__ C 0000 0 +__ATtiny4__ C 0001 1 +__ATtiny5__ C 0002 2 +__ATtiny9__ C 0003 3 +__ATtiny10__ C 0004 4 +__ATtiny11__ C 0005 5 +__ATtiny12__ C 0006 6 +__ATtiny13__ C 0007 7 +__ATtiny13A__ C 0008 8 +__ATtiny15__ C 0009 9 +__ATtiny20__ C 000a 10 +__ATtiny22__ C 000b 11 +__ATtiny24__ C 000c 12 +__ATtiny24A__ C 000d 13 +__ATtiny25__ C 000e 14 +__ATtiny26__ C 000f 15 +__ATtiny28__ C 0010 16 +__ATtiny44__ C 0011 17 +__ATtiny44A__ C 0012 18 +__ATtiny45__ C 0013 19 +__ATtiny84__ C 0014 20 +__ATtiny85__ C 0015 21 +__ATtiny2313__ C 0016 22 +__ATtiny2313A__ C 0017 23 +__ATtiny4313__ C 0018 24 +__AT90S1200__ C 0019 25 +__AT90S2313__ C 001a 26 +__AT90S2323__ C 001b 27 +__AT90S2333__ C 001c 28 +__AT90S2343__ C 001d 29 +__AT90S4414__ C 001e 30 +__AT90S4433__ C 001f 31 +__AT90S4434__ C 0020 32 +__AT90S8515__ C 0021 33 +__AT90C8534__ C 0022 34 +__AT90S8535__ C 0023 35 +__ATmega8__ C 0024 36 +__ATmega161__ C 0025 37 +__ATmega162__ C 0026 38 +__ATmega163__ C 0027 39 +__ATmega16__ C 0028 40 +__ATmega323__ C 0029 41 +__ATmega328P__ C 002a 42 +__ATmega32__ C 002b 43 +__ATmega603__ C 002c 44 +__ATmega103__ C 002d 45 +__ATmega104__ C 002e 46 +__ATmega128__ C 002f 47 +__ATmega48__ C 0030 48 +__ATmega88__ C 0031 49 +__ATmega168__ C 0032 50 +__ATmega8515__ C 0033 51 +__AT94K__ C 0034 52 +_M328PDEF_INC_ C 0001 1 +SIGNATURE_000 C 001e 30 +SIGNATURE_001 C 0095 149 +SIGNATURE_002 C 000f 15 +UDR0 C 00c6 198 +UBRR0L C 00c4 196 +UBRR0H C 00c5 197 +UCSR0C C 00c2 194 +UCSR0B C 00c1 193 +UCSR0A C 00c0 192 +TWAMR C 00bd 189 +TWCR C 00bc 188 +TWDR C 00bb 187 +TWAR C 00ba 186 +TWSR C 00b9 185 +TWBR C 00b8 184 +ASSR C 00b6 182 +OCR2B C 00b4 180 +OCR2A C 00b3 179 +TCNT2 C 00b2 178 +TCCR2B C 00b1 177 +TCCR2A C 00b0 176 +OCR1BL C 008a 138 +OCR1BH C 008b 139 +OCR1AL C 0088 136 +OCR1AH C 0089 137 +ICR1L C 0086 134 +ICR1H C 0087 135 +TCNT1L C 0084 132 +TCNT1H C 0085 133 +TCCR1C C 0082 130 +TCCR1B C 0081 129 +TCCR1A C 0080 128 +DIDR1 C 007f 127 +DIDR0 C 007e 126 +ADMUX C 007c 124 +ADCSRB C 007b 123 +ADCSRA C 007a 122 +ADCH C 0079 121 +ADCL C 0078 120 +TIMSK2 C 0070 112 +TIMSK1 C 006f 111 +TIMSK0 C 006e 110 +PCMSK1 C 006c 108 +PCMSK2 C 006d 109 +PCMSK0 C 006b 107 +EICRA C 0069 105 +PCICR C 0068 104 +OSCCAL C 0066 102 +PRR C 0064 100 +CLKPR C 0061 97 +WDTCSR C 0060 96 +SREG C 003f 63 +SPL C 003d 61 +SPH C 003e 62 +SPMCSR C 0037 55 +MCUCR C 0035 53 +MCUSR C 0034 52 +SMCR C 0033 51 +ACSR C 0030 48 +SPDR C 002e 46 +SPSR C 002d 45 +SPCR C 002c 44 +GPIOR2 C 002b 43 +GPIOR1 C 002a 42 +OCR0B C 0028 40 +OCR0A C 0027 39 +TCNT0 C 0026 38 +TCCR0B C 0025 37 +TCCR0A C 0024 36 +GTCCR C 0023 35 +EEARH C 0022 34 +EEARL C 0021 33 +EEDR C 0020 32 +EECR C 001f 31 +GPIOR0 C 001e 30 +EIMSK C 001d 29 +EIFR C 001c 28 +PCIFR C 001b 27 +TIFR2 C 0017 23 +TIFR1 C 0016 22 +TIFR0 C 0015 21 +PORTD C 000b 11 +DDRD C 000a 10 +PIND C 0009 9 +PORTC C 0008 8 +DDRC C 0007 7 +PINC C 0006 6 +PORTB C 0005 5 +DDRB C 0004 4 +PINB C 0003 3 +UDR0_0 C 0000 0 +UDR0_1 C 0001 1 +UDR0_2 C 0002 2 +UDR0_3 C 0003 3 +UDR0_4 C 0004 4 +UDR0_5 C 0005 5 +UDR0_6 C 0006 6 +UDR0_7 C 0007 7 +MPCM0 C 0000 0 +U2X0 C 0001 1 +UPE0 C 0002 2 +DOR0 C 0003 3 +FE0 C 0004 4 +UDRE0 C 0005 5 +TXC0 C 0006 6 +RXC0 C 0007 7 +TXB80 C 0000 0 +RXB80 C 0001 1 +UCSZ02 C 0002 2 +TXEN0 C 0003 3 +RXEN0 C 0004 4 +UDRIE0 C 0005 5 +TXCIE0 C 0006 6 +RXCIE0 C 0007 7 +UCPOL0 C 0000 0 +UCSZ00 C 0001 1 +UCPHA0 C 0001 1 +UCSZ01 C 0002 2 +UDORD0 C 0002 2 +USBS0 C 0003 3 +UPM00 C 0004 4 +UPM01 C 0005 5 +UMSEL00 C 0006 6 +UMSEL0 C 0006 6 +UMSEL01 C 0007 7 +UMSEL1 C 0007 7 +UBRR8 C 0000 0 +UBRR9 C 0001 1 +UBRR10 C 0002 2 +UBRR11 C 0003 3 +_UBRR0 C 0000 0 +_UBRR1 C 0001 1 +UBRR2 C 0002 2 +UBRR3 C 0003 3 +UBRR4 C 0004 4 +UBRR5 C 0005 5 +UBRR6 C 0006 6 +UBRR7 C 0007 7 +TWAM0 C 0001 1 +TWAMR0 C 0001 1 +TWAM1 C 0002 2 +TWAMR1 C 0002 2 +TWAM2 C 0003 3 +TWAMR2 C 0003 3 +TWAM3 C 0004 4 +TWAMR3 C 0004 4 +TWAM4 C 0005 5 +TWAMR4 C 0005 5 +TWAM5 C 0006 6 +TWAMR5 C 0006 6 +TWAM6 C 0007 7 +TWAMR6 C 0007 7 +TWBR0 C 0000 0 +TWBR1 C 0001 1 +TWBR2 C 0002 2 +TWBR3 C 0003 3 +TWBR4 C 0004 4 +TWBR5 C 0005 5 +TWBR6 C 0006 6 +TWBR7 C 0007 7 +TWIE C 0000 0 +TWEN C 0002 2 +TWWC C 0003 3 +TWSTO C 0004 4 +TWSTA C 0005 5 +TWEA C 0006 6 +TWINT C 0007 7 +TWPS0 C 0000 0 +TWPS1 C 0001 1 +TWS3 C 0003 3 +TWS4 C 0004 4 +TWS5 C 0005 5 +TWS6 C 0006 6 +TWS7 C 0007 7 +TWD0 C 0000 0 +TWD1 C 0001 1 +TWD2 C 0002 2 +TWD3 C 0003 3 +TWD4 C 0004 4 +TWD5 C 0005 5 +TWD6 C 0006 6 +TWD7 C 0007 7 +TWGCE C 0000 0 +TWA0 C 0001 1 +TWA1 C 0002 2 +TWA2 C 0003 3 +TWA3 C 0004 4 +TWA4 C 0005 5 +TWA5 C 0006 6 +TWA6 C 0007 7 +TOIE1 C 0000 0 +OCIE1A C 0001 1 +OCIE1B C 0002 2 +ICIE1 C 0005 5 +TOV1 C 0000 0 +OCF1A C 0001 1 +OCF1B C 0002 2 +ICF1 C 0005 5 +WGM10 C 0000 0 +WGM11 C 0001 1 +COM1B0 C 0004 4 +COM1B1 C 0005 5 +COM1A0 C 0006 6 +COM1A1 C 0007 7 +CS10 C 0000 0 +CS11 C 0001 1 +CS12 C 0002 2 +WGM12 C 0003 3 +WGM13 C 0004 4 +ICES1 C 0006 6 +ICNC1 C 0007 7 +FOC1B C 0006 6 +FOC1A C 0007 7 +PSRSYNC C 0000 0 +TSM C 0007 7 +TOIE2 C 0000 0 +TOIE2A C 0000 0 +OCIE2A C 0001 1 +OCIE2B C 0002 2 +TOV2 C 0000 0 +OCF2A C 0001 1 +OCF2B C 0002 2 +WGM20 C 0000 0 +WGM21 C 0001 1 +COM2B0 C 0004 4 +COM2B1 C 0005 5 +COM2A0 C 0006 6 +COM2A1 C 0007 7 +CS20 C 0000 0 +CS21 C 0001 1 +CS22 C 0002 2 +WGM22 C 0003 3 +FOC2B C 0006 6 +FOC2A C 0007 7 +TCNT2_0 C 0000 0 +TCNT2_1 C 0001 1 +TCNT2_2 C 0002 2 +TCNT2_3 C 0003 3 +TCNT2_4 C 0004 4 +TCNT2_5 C 0005 5 +TCNT2_6 C 0006 6 +TCNT2_7 C 0007 7 +OCR2A_0 C 0000 0 +OCR2A_1 C 0001 1 +OCR2A_2 C 0002 2 +OCR2A_3 C 0003 3 +OCR2A_4 C 0004 4 +OCR2A_5 C 0005 5 +OCR2A_6 C 0006 6 +OCR2A_7 C 0007 7 +OCR2B_0 C 0000 0 +OCR2B_1 C 0001 1 +OCR2B_2 C 0002 2 +OCR2B_3 C 0003 3 +OCR2B_4 C 0004 4 +OCR2B_5 C 0005 5 +OCR2B_6 C 0006 6 +OCR2B_7 C 0007 7 +TCR2BUB C 0000 0 +TCR2AUB C 0001 1 +OCR2BUB C 0002 2 +OCR2AUB C 0003 3 +TCN2UB C 0004 4 +AS2 C 0005 5 +EXCLK C 0006 6 +PSRASY C 0001 1 +PSR2 C 0001 1 +MUX0 C 0000 0 +MUX1 C 0001 1 +MUX2 C 0002 2 +MUX3 C 0003 3 +ADLAR C 0005 5 +REFS0 C 0006 6 +REFS1 C 0007 7 +ADPS0 C 0000 0 +ADPS1 C 0001 1 +ADPS2 C 0002 2 +ADIE C 0003 3 +ADIF C 0004 4 +ADATE C 0005 5 +ADSC C 0006 6 +ADEN C 0007 7 +ADTS0 C 0000 0 +ADTS1 C 0001 1 +ADTS2 C 0002 2 +ACME C 0006 6 +ADCH0 C 0000 0 +ADCH1 C 0001 1 +ADCH2 C 0002 2 +ADCH3 C 0003 3 +ADCH4 C 0004 4 +ADCH5 C 0005 5 +ADCH6 C 0006 6 +ADCH7 C 0007 7 +ADCL0 C 0000 0 +ADCL1 C 0001 1 +ADCL2 C 0002 2 +ADCL3 C 0003 3 +ADCL4 C 0004 4 +ADCL5 C 0005 5 +ADCL6 C 0006 6 +ADCL7 C 0007 7 +ADC0D C 0000 0 +ADC1D C 0001 1 +ADC2D C 0002 2 +ADC3D C 0003 3 +ADC4D C 0004 4 +ADC5D C 0005 5 +ACIS0 C 0000 0 +ACIS1 C 0001 1 +ACIC C 0002 2 +ACIE C 0003 3 +ACI C 0004 4 +ACO C 0005 5 +ACBG C 0006 6 +ACD C 0007 7 +AIN0D C 0000 0 +AIN1D C 0001 1 +PORTB0 C 0000 0 +PB0 C 0000 0 +PORTB1 C 0001 1 +PB1 C 0001 1 +PORTB2 C 0002 2 +PB2 C 0002 2 +PORTB3 C 0003 3 +PB3 C 0003 3 +PORTB4 C 0004 4 +PB4 C 0004 4 +PORTB5 C 0005 5 +PB5 C 0005 5 +PORTB6 C 0006 6 +PB6 C 0006 6 +PORTB7 C 0007 7 +PB7 C 0007 7 +DDB0 C 0000 0 +DDB1 C 0001 1 +DDB2 C 0002 2 +DDB3 C 0003 3 +DDB4 C 0004 4 +DDB5 C 0005 5 +DDB6 C 0006 6 +DDB7 C 0007 7 +PINB0 C 0000 0 +PINB1 C 0001 1 +PINB2 C 0002 2 +PINB3 C 0003 3 +PINB4 C 0004 4 +PINB5 C 0005 5 +PINB6 C 0006 6 +PINB7 C 0007 7 +PORTC0 C 0000 0 +PC0 C 0000 0 +PORTC1 C 0001 1 +PC1 C 0001 1 +PORTC2 C 0002 2 +PC2 C 0002 2 +PORTC3 C 0003 3 +PC3 C 0003 3 +PORTC4 C 0004 4 +PC4 C 0004 4 +PORTC5 C 0005 5 +PC5 C 0005 5 +PORTC6 C 0006 6 +PC6 C 0006 6 +DDC0 C 0000 0 +DDC1 C 0001 1 +DDC2 C 0002 2 +DDC3 C 0003 3 +DDC4 C 0004 4 +DDC5 C 0005 5 +DDC6 C 0006 6 +PINC0 C 0000 0 +PINC1 C 0001 1 +PINC2 C 0002 2 +PINC3 C 0003 3 +PINC4 C 0004 4 +PINC5 C 0005 5 +PINC6 C 0006 6 +PORTD0 C 0000 0 +PD0 C 0000 0 +PORTD1 C 0001 1 +PD1 C 0001 1 +PORTD2 C 0002 2 +PD2 C 0002 2 +PORTD3 C 0003 3 +PD3 C 0003 3 +PORTD4 C 0004 4 +PD4 C 0004 4 +PORTD5 C 0005 5 +PD5 C 0005 5 +PORTD6 C 0006 6 +PD6 C 0006 6 +PORTD7 C 0007 7 +PD7 C 0007 7 +DDD0 C 0000 0 +DDD1 C 0001 1 +DDD2 C 0002 2 +DDD3 C 0003 3 +DDD4 C 0004 4 +DDD5 C 0005 5 +DDD6 C 0006 6 +DDD7 C 0007 7 +PIND0 C 0000 0 +PIND1 C 0001 1 +PIND2 C 0002 2 +PIND3 C 0003 3 +PIND4 C 0004 4 +PIND5 C 0005 5 +PIND6 C 0006 6 +PIND7 C 0007 7 +TOIE0 C 0000 0 +OCIE0A C 0001 1 +OCIE0B C 0002 2 +TOV0 C 0000 0 +OCF0A C 0001 1 +OCF0B C 0002 2 +WGM00 C 0000 0 +WGM01 C 0001 1 +COM0B0 C 0004 4 +COM0B1 C 0005 5 +COM0A0 C 0006 6 +COM0A1 C 0007 7 +CS00 C 0000 0 +CS01 C 0001 1 +CS02 C 0002 2 +WGM02 C 0003 3 +FOC0B C 0006 6 +FOC0A C 0007 7 +TCNT0_0 C 0000 0 +TCNT0_1 C 0001 1 +TCNT0_2 C 0002 2 +TCNT0_3 C 0003 3 +TCNT0_4 C 0004 4 +TCNT0_5 C 0005 5 +TCNT0_6 C 0006 6 +TCNT0_7 C 0007 7 +OCR0A_0 C 0000 0 +OCR0A_1 C 0001 1 +OCR0A_2 C 0002 2 +OCR0A_3 C 0003 3 +OCR0A_4 C 0004 4 +OCR0A_5 C 0005 5 +OCR0A_6 C 0006 6 +OCR0A_7 C 0007 7 +OCR0B_0 C 0000 0 +OCR0B_1 C 0001 1 +OCR0B_2 C 0002 2 +OCR0B_3 C 0003 3 +OCR0B_4 C 0004 4 +OCR0B_5 C 0005 5 +OCR0B_6 C 0006 6 +OCR0B_7 C 0007 7 +PSR10 C 0000 0 +ISC00 C 0000 0 +ISC01 C 0001 1 +ISC10 C 0002 2 +ISC11 C 0003 3 +INT0 C 0000 0 +INT1 C 0001 1 +INTF0 C 0000 0 +INTF1 C 0001 1 +PCIE0 C 0000 0 +PCIE1 C 0001 1 +PCIE2 C 0002 2 +PCINT16 C 0000 0 +PCINT17 C 0001 1 +PCINT18 C 0002 2 +PCINT19 C 0003 3 +PCINT20 C 0004 4 +PCINT21 C 0005 5 +PCINT22 C 0006 6 +PCINT23 C 0007 7 +PCINT8 C 0000 0 +PCINT9 C 0001 1 +PCINT10 C 0002 2 +PCINT11 C 0003 3 +PCINT12 C 0004 4 +PCINT13 C 0005 5 +PCINT14 C 0006 6 +PCINT0 C 0000 0 +PCINT1 C 0001 1 +PCINT2 C 0002 2 +PCINT3 C 0003 3 +PCINT4 C 0004 4 +PCINT5 C 0005 5 +PCINT6 C 0006 6 +PCINT7 C 0007 7 +PCIF0 C 0000 0 +PCIF1 C 0001 1 +PCIF2 C 0002 2 +SPDR0 C 0000 0 +SPDR1 C 0001 1 +SPDR2 C 0002 2 +SPDR3 C 0003 3 +SPDR4 C 0004 4 +SPDR5 C 0005 5 +SPDR6 C 0006 6 +SPDR7 C 0007 7 +SPI2X C 0000 0 +WCOL C 0006 6 +SPIF C 0007 7 +SPR0 C 0000 0 +SPR1 C 0001 1 +CPHA C 0002 2 +CPOL C 0003 3 +MSTR C 0004 4 +DORD C 0005 5 +SPE C 0006 6 +SPIE C 0007 7 +WDP0 C 0000 0 +WDP1 C 0001 1 +WDP2 C 0002 2 +WDE C 0003 3 +WDCE C 0004 4 +WDP3 C 0005 5 +WDIE C 0006 6 +WDIF C 0007 7 +SREG_C C 0000 0 +SREG_Z C 0001 1 +SREG_N C 0002 2 +SREG_V C 0003 3 +SREG_S C 0004 4 +SREG_H C 0005 5 +SREG_T C 0006 6 +SREG_I C 0007 7 +CAL0 C 0000 0 +CAL1 C 0001 1 +CAL2 C 0002 2 +CAL3 C 0003 3 +CAL4 C 0004 4 +CAL5 C 0005 5 +CAL6 C 0006 6 +CAL7 C 0007 7 +CLKPS0 C 0000 0 +CLKPS1 C 0001 1 +CLKPS2 C 0002 2 +CLKPS3 C 0003 3 +CLKPCE C 0007 7 +SELFPRGEN C 0000 0 +SPMEN C 0000 0 +PGERS C 0001 1 +PGWRT C 0002 2 +BLBSET C 0003 3 +RWWSRE C 0004 4 +SIGRD C 0005 5 +RWWSB C 0006 6 +SPMIE C 0007 7 +IVCE C 0000 0 +IVSEL C 0001 1 +PUD C 0004 4 +BODSE C 0005 5 +BODS C 0006 6 +PORF C 0000 0 +EXTRF C 0001 1 +EXTREF C 0001 1 +BORF C 0002 2 +WDRF C 0003 3 +SE C 0000 0 +SM0 C 0001 1 +SM1 C 0002 2 +SM2 C 0003 3 +GPIOR20 C 0000 0 +GPIOR21 C 0001 1 +GPIOR22 C 0002 2 +GPIOR23 C 0003 3 +GPIOR24 C 0004 4 +GPIOR25 C 0005 5 +GPIOR26 C 0006 6 +GPIOR27 C 0007 7 +GPIOR10 C 0000 0 +GPIOR11 C 0001 1 +GPIOR12 C 0002 2 +GPIOR13 C 0003 3 +GPIOR14 C 0004 4 +GPIOR15 C 0005 5 +GPIOR16 C 0006 6 +GPIOR17 C 0007 7 +GPIOR00 C 0000 0 +GPIOR01 C 0001 1 +GPIOR02 C 0002 2 +GPIOR03 C 0003 3 +GPIOR04 C 0004 4 +GPIOR05 C 0005 5 +GPIOR06 C 0006 6 +GPIOR07 C 0007 7 +PRADC C 0000 0 +PRUSART0 C 0001 1 +PRSPI C 0002 2 +PRTIM1 C 0003 3 +PRTIM0 C 0005 5 +PRTIM2 C 0006 6 +PRTWI C 0007 7 +EEAR0 C 0000 0 +EEAR1 C 0001 1 +EEAR2 C 0002 2 +EEAR3 C 0003 3 +EEAR4 C 0004 4 +EEAR5 C 0005 5 +EEAR6 C 0006 6 +EEAR7 C 0007 7 +EEAR8 C 0000 0 +EEAR9 C 0001 1 +EEDR0 C 0000 0 +EEDR1 C 0001 1 +EEDR2 C 0002 2 +EEDR3 C 0003 3 +EEDR4 C 0004 4 +EEDR5 C 0005 5 +EEDR6 C 0006 6 +EEDR7 C 0007 7 +EERE C 0000 0 +EEPE C 0001 1 +EEMPE C 0002 2 +EERIE C 0003 3 +EEPM0 C 0004 4 +EEPM1 C 0005 5 +LB1 C 0000 0 +LB2 C 0001 1 +BLB01 C 0002 2 +BLB02 C 0003 3 +BLB11 C 0004 4 +BLB12 C 0005 5 +CKSEL0 C 0000 0 +CKSEL1 C 0001 1 +CKSEL2 C 0002 2 +CKSEL3 C 0003 3 +SUT0 C 0004 4 +SUT1 C 0005 5 +CKOUT C 0006 6 +CKDIV8 C 0007 7 +BOOTRST C 0000 0 +BOOTSZ0 C 0001 1 +BOOTSZ1 C 0002 2 +EESAVE C 0003 3 +WDTON C 0004 4 +SPIEN C 0005 5 +DWEN C 0006 6 +RSTDISBL C 0007 7 +BODLEVEL0 C 0000 0 +BODLEVEL1 C 0001 1 +BODLEVEL2 C 0002 2 +FLASHEND C 3fff 16383 +IOEND C 00ff 255 +SRAM_START C 0100 256 +SRAM_SIZE C 0800 2048 +RAMEND C 08ff 2303 +XRAMEND C 0000 0 +E2END C 03ff 1023 +EEPROMEND C 03ff 1023 +EEADRBITS C 000a 10 +NRWW_START_ADDR C 3800 14336 +NRWW_STOP_ADDR C 3fff 16383 +RWW_START_ADDR C 0000 0 +RWW_STOP_ADDR C 37ff 14335 +PAGESIZE C 0040 64 +FIRSTBOOTSTART C 3f00 16128 +SECONDBOOTSTART C 3e00 15872 +THIRDBOOTSTART C 3c00 15360 +FOURTHBOOTSTART C 3800 14336 +SMALLBOOTSTART C 3f00 16128 +LARGEBOOTSTART C 3800 14336 +INT0addr C 0002 2 +INT1addr C 0004 4 +PCI0addr C 0006 6 +PCI1addr C 0008 8 +PCI2addr C 000a 10 +WDTaddr C 000c 12 +OC2Aaddr C 000e 14 +OC2Baddr C 0010 16 +OVF2addr C 0012 18 +ICP1addr C 0014 20 +OC1Aaddr C 0016 22 +OC1Baddr C 0018 24 +OVF1addr C 001a 26 +OC0Aaddr C 001c 28 +OC0Baddr C 001e 30 +OVF0addr C 0020 32 +SPIaddr C 0022 34 +URXCaddr C 0024 36 +UDREaddr C 0026 38 +UTXCaddr C 0028 40 +ADCCaddr C 002a 42 +ERDYaddr C 002c 44 +ACIaddr C 002e 46 +TWIaddr C 0030 48 +SPMRaddr C 0032 50 +INT_VECTORS_SIZE C 0034 52 +iVal C 2710 10000 +myloc C 0200 512 +__DEVICE__ V 002a 42 +__FLASH_SIZE__ V 4000 16384 +__EEPROM_SIZE__ V 0400 1024 +__RAM_SIZE__ V 0800 2048 +check_address L 000c 12 +done L 0012 18 +ledchaser L 0014 20 +start L 001c 28 +delay10ms L 0023 35 +iLoop L 0025 37 + diff --git a/m328Pdef.inc b/m328Pdef.inc new file mode 100644 index 0000000..12ad66a --- /dev/null +++ b/m328Pdef.inc @@ -0,0 +1,979 @@ +;***** THIS IS A MACHINE GENERATED FILE - DO NOT EDIT ******************** +;***** Created: 2011-02-09 12:03 ******* Source: ATmega328P.xml ********** +;************************************************************************* +;* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y +;* +;* Number : AVR000 +;* File Name : "m328Pdef.inc" +;* Title : Register/Bit Definitions for the ATmega328P +;* Date : 2011-02-09 +;* Version : 2.35 +;* Support E-mail : avr@atmel.com +;* Target MCU : ATmega328P +;* +;* DESCRIPTION +;* When including this file in the assembly program file, all I/O register +;* names and I/O register bit names appearing in the data book can be used. +;* In addition, the six registers forming the three data pointers X, Y and +;* Z have been assigned names XL - ZH. Highest RAM address for Internal +;* SRAM is also defined +;* +;* The Register names are represented by their hexadecimal address. +;* +;* The Register Bit names are represented by their bit number (0-7). +;* +;* Please observe the difference in using the bit names with instructions +;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc" +;* (skip if bit in register set/cleared). The following example illustrates +;* this: +;* +;* in r16,PORTB ;read PORTB latch +;* sbr r16,(1<a)D za{#2&c;|P=i~s%qbltzM>*@yE6ENhkr!qT%t<#HK_Bybdzs#w~hZ{Wl+p6t~2zIL# zyh1~@1AIbbvo9QMx51R);va3d7EG(sZZZZP z;de*~?k}~S6*?ccVNU3J+=rylZTid$J#_z}x1#kHROxeTu|=W3HUUe*z>5n~!eCfe z%Yvu=3M;~prOK+{eg1|u!58g>bz#^H-4I61&`rT_Mx=#+>AWihUu>`^gr0vOBZO-= zpgf~*4{#tv9+Wv0#_FGNBt*-Ta4d|QHBJPzgRH*EvflZOSiE$VjTcVx#aM~LOd^>+ L%bmyaMMZuArbj{N literal 0 HcmV?d00001