[BUG] Lower duty cycle PWM results in motor stall conditions #6

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opened 2025-02-20 16:45:41 +00:00 by jakegoodwin · 2 comments

jakegoodwin commented

2025-02-20 16:45:41 +00:00

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Steps to fix:

Find minimum viable duty cycle.
Refactor motor functions to map to new valid range.
Send out new version for testing.

Steps to fix: - Find minimum viable duty cycle. - Refactor motor functions to map to new valid range. - Send out new version for testing.

jakegoodwin added the

bug

label 2025-02-20 16:45:41 +00:00

jakegoodwin self-assigned this 2025-02-20 16:45:41 +00:00

jakegoodwin commented

2025-02-20 16:46:34 +00:00

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As a side note, I could potentially write a program that would attempt various duty cycles at different frequencies to figure out which one worked correctly.

This could potentially auto calibrate the fader/motor setup, however it may take up too much space.

As a side note, I could potentially write a program that would attempt various duty cycles at different frequencies to figure out which one worked correctly. This could potentially auto calibrate the fader/motor setup, however it may take up too much space.

jakegoodwin commented

2025-02-20 23:49:13 +00:00

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Owner

Added speed control during the motor movement loop. This should help better test the duty cycle. Now it's configured with a F_CPU equal to 1/8 of the crystal so 9.6/8=1.2. I think this could have been part of the issue, it previously assumed no clock divider.

Added speed control during the motor movement loop. This should help better test the duty cycle. Now it's configured with a `F_CPU` equal to 1/8 of the crystal so `9.6/8=1.2`. I think this could have been part of the issue, it previously assumed no clock divider.