jakeg00dwin
|
a926cc3836
|
setup usage of the new ReadReg function.
|
2024-07-27 09:28:17 -07:00 |
|
jakeg00dwin
|
a92cdead2e
|
fixed up ADC code + tests to make them pass
|
2024-07-27 09:06:23 -07:00 |
|
jakeg00dwin
|
8117d3f890
|
fix of port storage
|
2024-07-26 18:19:36 -07:00 |
|
jakeg00dwin
|
f3c48ba643
|
Removed magic numbers from the Reading of the ZCD pin.
|
2024-07-26 18:18:23 -07:00 |
|
jakeg00dwin
|
b987d81827
|
Cleaned up comments in the TriacOut module
|
2024-07-26 18:18:09 -07:00 |
|
jakeg00dwin
|
29426ad4a5
|
Updated to follow the mocks
|
2024-07-26 18:17:53 -07:00 |
|
jakeg00dwin
|
7c0fc29687
|
defined the F_CPU here
|
2024-07-24 17:54:41 -07:00 |
|
jakeg00dwin
|
437479b0b5
|
Commented out the unused function
|
2024-07-24 17:54:27 -07:00 |
|
jakeg00dwin
|
2be04980d1
|
Changed to using an initial value for u16.
|
2024-07-24 17:54:11 -07:00 |
|
jakeg00dwin
|
f80f61c9ff
|
Converted to hybrid between MPLABX and Cmake for test harness.
|
2024-07-24 17:21:29 -07:00 |