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11 commits
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7 changed files with 163 additions and 47 deletions
2
Doxyfile
2
Doxyfile
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@ -48,7 +48,7 @@ PROJECT_NAME = "Thermostat"
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# could be handy for archiving the generated documentation or if some version
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# control system is used.
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PROJECT_NUMBER = 0.1
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PROJECT_NUMBER = 1.2.0
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||||
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# Using the PROJECT_BRIEF tag one can provide an optional one line description
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# for a project that appears at the top of each page and should give viewer a
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|
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|||
4
dist/attiny404/production/memoryfile.xml
vendored
4
dist/attiny404/production/memoryfile.xml
vendored
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@ -4,8 +4,8 @@
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<memory name="program">
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||||
<units>bytes</units>
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||||
<length>4096</length>
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<used>2174</used>
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||||
<free>1922</free>
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<used>2334</used>
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<free>1762</free>
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</memory>
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<memory name="data">
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<units>bytes</units>
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25
inc/config.h
25
inc/config.h
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@ -56,12 +56,29 @@ const uint16_t GatePulses[5] = {250, 500, 750, 1000, 1250};
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const double Tau = 8250;
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/**
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* @brief Hysteresis value
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* Anything below this value will keep or turn on the associated
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* pin in thermostat mode.
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* @brief The upper Hystersis value.(Override)
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* This is the upper bound of the digital/boolean hysteresis curve. It
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* takes presidence over the value in `/src/load.h`
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*
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* If the input is below low it always sets the output high.
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* If the input is between high and low with the output high it stays high.
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* If the input is above high and the ouput is high it's set low.
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*/
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#define HYSTERESIS 900
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#define HYSTERESIS_HI 900
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/**
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* @brief The lower Hystersis value.(Override)
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* This is the upper bound of the digital/boolean hysteresis curve. It
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* takes presidence over the value in `/src/load.h`
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*
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* If the input is below low it always sets the output high.
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* If the input is between high and low with the output high it stays high.
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* If the input is above high and the ouput is high it's set low.
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*/
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#define HYSTERESIS_LO 700
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#endif //CONFIG_H
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@ -75,7 +75,7 @@ void RegEdit_SetNum(void *reg, uint8_t num)
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uint8_t RegEdit_ReadReg(void *reg)
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{
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mock_c()->actualCall("RegEdit_ReadReg")
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return mock_c()->actualCall("RegEdit_ReadReg")
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->withPointerParameters("reg", reg)
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->returnUnsignedIntValueOrDefault(0);
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//Return value is mock controlled. So it does actually return a uint8_t
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@ -38,9 +38,23 @@ static bool is_valid_load(uint16_t val)
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return false;
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}
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static bool is_below_target(uint16_t val)
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static bool is_high_valid(uint16_t val, bool output_level)
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{
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if(val < HYSTERESIS){
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if(val < HYSTERESIS_LO){
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return true;
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}
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else if(val <= HYSTERESIS_HI && output_level) {
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return true;
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}
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return false;
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}
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static bool is_low_valid(uint16_t val, bool output_level)
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{
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if(val > HYSTERESIS_HI) {
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return true;
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}
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else if(val >= HYSTERESIS_HI && output_level) {
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return true;
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}
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return false;
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@ -60,18 +74,23 @@ static uint16_t sample_adc(uint8_t adc_pin)
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void Load_HandleLoadPortA(uint8_t adc_pin, uint8_t out_pin)
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{
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uint16_t val = sample_adc(adc_pin);
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if(porta_disabled[adc_pin]){
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bool out_state = RegEdit_IsBitSet((void *) &PORTA.OUT, out_pin);
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if(porta_disabled[adc_pin]) {
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RegEdit_ClearBit((void *) &PORTA.OUT, out_pin);
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}
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else if(!is_valid_load(val)){
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else if(!is_valid_load(val)) {
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RegEdit_ClearBit((void *) &PORTA.OUT, out_pin);
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porta_disabled[adc_pin] = true;
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}
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else if(is_below_target(val)){
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else if(is_high_valid(val, out_state)) {
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RegEdit_SetBit((void *) &PORTA.DIR, out_pin);
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RegEdit_SetBit((void *) &PORTA.OUT, out_pin);
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}
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else{
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else if(is_low_valid(val, out_pin)) {
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RegEdit_ClearBit((void *) &PORTA.OUT, out_pin);
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}
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else {
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RegEdit_ClearBit((void *) &PORTA.OUT, out_pin);
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}
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}
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@ -79,18 +98,23 @@ void Load_HandleLoadPortA(uint8_t adc_pin, uint8_t out_pin)
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void Load_HandleLoadPortB(uint8_t adc_pin, uint8_t out_pin)
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{
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uint16_t val = sample_adc(adc_pin);
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if(portb_disabled[adc_pin]){
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bool out_state = RegEdit_IsBitSet((void *) &PORTB.OUT, out_pin);
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if(portb_disabled[adc_pin]) {
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RegEdit_ClearBit((void *) &PORTB.OUT, out_pin);
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}
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else if(!is_valid_load(val)){
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else if(!is_valid_load(val)) {
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RegEdit_ClearBit((void *) &PORTB.OUT, out_pin);
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portb_disabled[adc_pin] = true;
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}
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else if(is_below_target(val)) {
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else if(is_high_valid(val, out_state)) {
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RegEdit_SetBit((void *) &PORTB.DIR, out_pin);
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RegEdit_SetBit((void *) &PORTB.OUT, out_pin);
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}
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else{
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else if(is_low_valid(val, out_pin)) {
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RegEdit_ClearBit((void *) &PORTB.OUT, out_pin);
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}
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else {
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RegEdit_ClearBit((void *) &PORTB.OUT, out_pin);
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}
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}
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@ -28,10 +28,31 @@
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#define HIGHTHRESH 1000
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#ifndef HYSTERESIS
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#define HYSTERESIS 900
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/**
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* @brief The upper Hystersis value.
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* This is the upper bound of the digital/boolean hysteresis curve.
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*
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* If the input is below low it always sets the output high.
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* If the input is between high and low with the output high it stays high.
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* If the input is above high and the ouput is high it's set low.
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*/
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#ifndef HYSTERESIS_HI
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#define HYSTERESIS_HI 900
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#endif
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/**
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* @brief The lower Hystersis value.
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* This is the upper bound of the digital/boolean hysteresis curve.
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*
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* If the input is below low it always sets the output high.
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* If the input is between high and low with the output high it stays high.
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* If the input is above high and the ouput is high it's set low.
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*/
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#ifndef HYSTERESIS_LO
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#define HYSTERESIS_LO 700
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#endif
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/**
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* @brief Checks if the adc pin is inbetween LOWTHRESH and HIGHTHRESH and then
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* sets or disables the output pin on PORTA.
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@ -18,7 +18,6 @@ extern "C"
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#include <iotn404.h> //ATtiny404 header fille.
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#include "load.h"
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#include "MockADC.h"
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#include "MockADC.h"
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}
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TEST_GROUP(test_load)
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@ -55,15 +54,25 @@ void setup_adc_expectations(uint8_t adc_pin)
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mock().expectOneCall("ADC_Disable");
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}
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void expect_porta_disabled(uint8_t load_pin)
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void expect_porta_disabled(uint8_t load_pin, bool output_level)
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{
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mock().expectOneCall("RegEdit_IsBitSet")
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.withPointerParameter("reg", (void *) &PORTA.OUT)
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.withUnsignedIntParameter("bit_num", load_pin)
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.andReturnValue(output_level);
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mock().expectOneCall("RegEdit_ClearBit")
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.withPointerParameter("reg", (void *) &PORTA.OUT)
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.withUnsignedIntParameter("bit_num", load_pin);
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}
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void expect_porta_enabled(uint8_t load_pin)
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void expect_porta_enabled(uint8_t load_pin, bool output_level)
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{
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mock().expectOneCall("RegEdit_IsBitSet")
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.withPointerParameter("reg", (void *) &PORTA.OUT)
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.withUnsignedIntParameter("bit_num", load_pin)
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.andReturnValue(output_level);
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mock().expectOneCall("RegEdit_SetBit")
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.withPointerParameter("reg", (void *) &PORTA.DIR)
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.withUnsignedIntParameter("bit_num", load_pin);
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@ -73,16 +82,26 @@ void expect_porta_enabled(uint8_t load_pin)
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.withUnsignedIntParameter("bit_num", load_pin);
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}
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void expect_portb_disabled(uint8_t load_pin)
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void expect_portb_disabled(uint8_t load_pin, bool output_level)
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{
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mock().expectOneCall("RegEdit_IsBitSet")
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.withPointerParameter("reg", (void *) &PORTB.OUT)
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.withUnsignedIntParameter("bit_num", load_pin)
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.andReturnValue(output_level);
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mock().expectOneCall("RegEdit_ClearBit")
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.withPointerParameter("reg", (void *) &PORTB.OUT)
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.withUnsignedIntParameter("bit_num", load_pin);
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}
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void expect_portb_enabled(uint8_t load_pin)
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void expect_portb_enabled(uint8_t load_pin, bool output_level)
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{
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mock().expectOneCall("RegEdit_IsBitSet")
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.withPointerParameter("reg", (void *) &PORTB.OUT)
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.withUnsignedIntParameter("bit_num", load_pin)
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.andReturnValue(output_level);
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mock().expectOneCall("RegEdit_SetBit")
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.withPointerParameter("reg", (void *) &PORTB.DIR)
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.withUnsignedIntParameter("bit_num", load_pin);
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@ -97,7 +116,7 @@ TEST(test_load, PortAHandlerDisabledHigh)
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MockADC_PushValue(HIGHTHRESH);
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setup_adc_expectations(adc_pin);
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expect_porta_disabled(load_pin);
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expect_porta_disabled(load_pin, true);
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Load_HandleLoadPortA(adc_pin, load_pin);
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}
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@ -107,41 +126,53 @@ TEST(test_load, PortAHandlerDisabledLow)
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MockADC_PushValue(LOWTHRESH);
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setup_adc_expectations(adc_pin);
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expect_porta_disabled(load_pin);
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expect_porta_disabled(load_pin, false);
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Load_HandleLoadPortA(adc_pin, load_pin);
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}
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TEST(test_load, PortAHandlerEnabledBelowTarget)
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TEST(test_load, PortAHandlerEnabledRisingEdgeLO)
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{
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MockADC_PushValue(HYSTERESIS - 1);
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//Start from the rising edge.
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MockADC_PushValue(HYSTERESIS_LO - 1);
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setup_adc_expectations(adc_pin);
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expect_porta_enabled(load_pin);
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expect_porta_enabled(load_pin, false);
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Load_HandleLoadPortA(adc_pin, load_pin);
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}
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TEST(test_load, PortAHandlerEnabledRisingEdgeHI)
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{
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//Start from the rising edge above lo.
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MockADC_PushValue(HYSTERESIS_HI - 1);
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setup_adc_expectations(adc_pin);
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expect_porta_enabled(load_pin, true);
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Load_HandleLoadPortA(adc_pin, load_pin);
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}
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TEST(test_load, PortAHandlerDisabledAboveTarget)
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{
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MockADC_PushValue(HYSTERESIS);
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MockADC_PushValue(HYSTERESIS_HI + 1);
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setup_adc_expectations(adc_pin);
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expect_porta_disabled(load_pin);
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expect_porta_disabled(load_pin, true);
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Load_HandleLoadPortA(adc_pin, load_pin);
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}
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TEST(test_load, PortAHandlerDisablesUntilPoweReset)
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{
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MockADC_PushValue(HYSTERESIS - 1);
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MockADC_PushValue(HYSTERESIS_HI - 1);
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MockADC_PushValue(HIGHTHRESH);
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setup_adc_expectations(adc_pin);
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expect_porta_disabled(load_pin);
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expect_porta_disabled(load_pin, true);
|
||||
|
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setup_adc_expectations(adc_pin);
|
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expect_porta_disabled(load_pin);
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expect_porta_disabled(load_pin, false);
|
||||
|
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Load_HandleLoadPortA(adc_pin, load_pin);
|
||||
Load_HandleLoadPortA(adc_pin, load_pin);
|
||||
|
|
@ -153,7 +184,7 @@ TEST(test_load, PortBHandlerDisabledHigh)
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|||
MockADC_PushValue(HIGHTHRESH);
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||||
|
||||
setup_adc_expectations(adc_pin);
|
||||
expect_portb_disabled(load_pin);
|
||||
expect_portb_disabled(load_pin, true);
|
||||
|
||||
Load_HandleLoadPortB(adc_pin, load_pin);
|
||||
}
|
||||
|
|
@ -163,43 +194,66 @@ TEST(test_load, PortBHandlerDisabledLow)
|
|||
MockADC_PushValue(LOWTHRESH);
|
||||
|
||||
setup_adc_expectations(adc_pin);
|
||||
expect_portb_disabled(load_pin);
|
||||
expect_portb_disabled(load_pin, false);
|
||||
|
||||
Load_HandleLoadPortB(adc_pin, load_pin);
|
||||
}
|
||||
|
||||
|
||||
TEST(test_load, PortBHandlerEnabledBelowTarget)
|
||||
TEST(test_load, PortBHandlerEnabledRisingEdgeLO)
|
||||
{
|
||||
MockADC_PushValue(HYSTERESIS - 1);
|
||||
//Start from the rising edge.
|
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MockADC_PushValue(HYSTERESIS_LO - 1);
|
||||
|
||||
setup_adc_expectations(adc_pin);
|
||||
expect_portb_enabled(load_pin);
|
||||
expect_portb_enabled(load_pin, false);
|
||||
|
||||
Load_HandleLoadPortB(adc_pin, load_pin);
|
||||
}
|
||||
|
||||
|
||||
TEST(test_load, PortBHandlerDisabledAboveTarget)
|
||||
TEST(test_load, PortBHandlerEnabledRisingEdgeHI)
|
||||
{
|
||||
MockADC_PushValue(HYSTERESIS);
|
||||
//Start from the rising edge.
|
||||
MockADC_PushValue(HYSTERESIS_HI - 1);
|
||||
|
||||
setup_adc_expectations(adc_pin);
|
||||
expect_portb_disabled(load_pin);
|
||||
expect_portb_enabled(load_pin, true);
|
||||
|
||||
Load_HandleLoadPortB(adc_pin, load_pin);
|
||||
}
|
||||
|
||||
TEST(test_load, PortBHandlerDisableFallingEdgeLO)
|
||||
{
|
||||
//Start from the falling edge.
|
||||
MockADC_PushValue(HYSTERESIS_LO + 1);
|
||||
|
||||
setup_adc_expectations(adc_pin);
|
||||
expect_portb_disabled(load_pin, false);
|
||||
|
||||
Load_HandleLoadPortB(adc_pin, load_pin);
|
||||
}
|
||||
|
||||
TEST(test_load, PortBHandlerDisableFallingEdgeHI)
|
||||
{
|
||||
//Start from the falling edge.
|
||||
MockADC_PushValue(HYSTERESIS_HI + 1);
|
||||
|
||||
setup_adc_expectations(adc_pin);
|
||||
expect_portb_disabled(load_pin, false);
|
||||
|
||||
Load_HandleLoadPortB(adc_pin, load_pin);
|
||||
}
|
||||
|
||||
TEST(test_load, PortBHandlerDisablesUntilPoweReset)
|
||||
{
|
||||
MockADC_PushValue(HYSTERESIS - 1);
|
||||
MockADC_PushValue(HYSTERESIS_HI - 1);
|
||||
MockADC_PushValue(HIGHTHRESH);
|
||||
|
||||
setup_adc_expectations(adc_pin);
|
||||
expect_portb_disabled(load_pin);
|
||||
expect_portb_disabled(load_pin, true);
|
||||
|
||||
setup_adc_expectations(adc_pin);
|
||||
expect_portb_disabled(load_pin);
|
||||
expect_portb_disabled(load_pin, false);
|
||||
|
||||
Load_HandleLoadPortB(adc_pin, load_pin);
|
||||
Load_HandleLoadPortB(adc_pin, load_pin);
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue