removed the uneeded code for G2 and G3. Added function for instead using the Enable pins.

This commit is contained in:
jakeg00dwin 2024-07-20 10:27:46 -07:00
parent 0a2c8b1dab
commit d084599429
6 changed files with 51 additions and 45 deletions

View File

@ -29,16 +29,16 @@ void TriacOut_InitTimerA(void)
void TriacOut_SetupPins(void) void TriacOut_SetupPins(void)
{ {
RegEdit_SetBit((void *) &PORTA.DIR, G1); RegEdit_SetBit((void *) &PORTA.DIR, G1);
RegEdit_SetBit((void *) &PORTB.DIR, G2); //RegEdit_SetBit((void *) &PORTB.DIR, G2);
RegEdit_SetBit((void *) &PORTB.DIR, G3); //RegEdit_SetBit((void *) &PORTB.DIR, G3);
} }
void TriacOut_SetAllHigh(void) void TriacOut_SetAllHigh(void)
{ {
RegEdit_SetBit((void *) &PORTA.OUT, G1); RegEdit_SetBit((void *) &PORTA.OUT, G1);
RegEdit_SetBit((void *) &PORTB.OUT, G2); //RegEdit_SetBit((void *) &PORTB.OUT, G2);
RegEdit_SetBit((void *) &PORTB.OUT, G3); //RegEdit_SetBit((void *) &PORTB.OUT, G3);
} }
@ -48,8 +48,8 @@ void TriacOut_PulsePins(uint16_t pulse_time)
Delay_MicroSeconds(pulse_time); Delay_MicroSeconds(pulse_time);
RegEdit_ClearBit((void *) &PORTA.OUT, G1); RegEdit_ClearBit((void *) &PORTA.OUT, G1);
RegEdit_ClearBit((void *) &PORTB.OUT, G2); //RegEdit_ClearBit((void *) &PORTB.OUT, G2);
RegEdit_ClearBit((void *) &PORTB.OUT, G3); //RegEdit_ClearBit((void *) &PORTB.OUT, G3);
} }

28
main.c
View File

@ -9,11 +9,10 @@
* extracted into separate source files and headers for configuration. * extracted into separate source files and headers for configuration.
*/ */
//#define F_CPU 2000000UL
#define F_CPU 3333333UL #define F_CPU 3333333UL
//These defines are mostly useful for when you want you editors LSP server to //These defines are mostly useful for when you want your editors LSP server to
//function correctly. //function correctly.
//#ifndef __AVR_ATtiny404__ //#ifndef __AVR_ATtiny404__
//#define __AVR_ATtiny404__ //#define __AVR_ATtiny404__
@ -36,27 +35,34 @@
//Set the function pointer for the delay func //Set the function pointer for the delay func
void (*Delay_MicroSeconds)(double us) = _delay_us; void (*Delay_MicroSeconds)(double us) = _delay_us;
//void (*Delay_MicroSeconds)(double us) = _delay_ms;
static void CLK_DisablePrescaler(void) static void setEnablePinsHigh(void)
{ {
//CCP = CCP_IOREG_gc; /* Write the needed signature to CCP*/ //Pins 12, 6 and 7 are all set high.
ccp_write_io((void *) & (CLKCTRL.MCLKCTRLA), 0x00); //select internal 20MHz clock. PORTA.DIR |= (1<<2); //PA2= pin 12
ccp_write_io((void *) & (CLKCTRL.MCLKCTRLB), 0x00); //Disable the pre-scaler. PORTB.DIR |= (1<<2)|(1<<3); //PB2 = pin 7, PB3 = pin 6
}
PORTA.OUT |= (1<<2);
PORTB.OUT |= (1<<2)|(1<<3);
}
int main(int argc, char **argv) int main(int argc, char **argv)
{ {
//CLK_DisablePrescaler();
while(true){ while(true){
for(int i = 0; i < GatePulsesQty; i++){ for(int i = 0; i < GatePulsesQty; i++){
ZCD_Poll(); ZCD_Poll();
_delay_us(Tau); _delay_us(Tau);
TriacOut_SetupPins(); TriacOut_SetupPins();
TriacOut_SetAllHigh(); TriacOut_SetAllHigh(); //Only G1 exists in High power mode
TriacOut_PulsePins(GatePulses[i]); TriacOut_PulsePins(GatePulses[i]);
} }
//The G1 pin is low at this point.
_delay_ms(2500);
ZCD_Poll();
setEnablePinsHigh();
while(true){
; //Do nothing until new Power cycle/reset occurs
}
} }
} }

View File

@ -30,12 +30,12 @@ ifeq ($(TYPE_IMAGE), DEBUG_RUN)
IMAGE_TYPE=debug IMAGE_TYPE=debug
OUTPUT_SUFFIX=elf OUTPUT_SUFFIX=elf
DEBUGGABLE_SUFFIX=elf DEBUGGABLE_SUFFIX=elf
FINAL_IMAGE=${DISTDIR}/fg004a_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} FINAL_IMAGE=${DISTDIR}/fg004a_high_power.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
else else
IMAGE_TYPE=production IMAGE_TYPE=production
OUTPUT_SUFFIX=hex OUTPUT_SUFFIX=hex
DEBUGGABLE_SUFFIX=elf DEBUGGABLE_SUFFIX=elf
FINAL_IMAGE=${DISTDIR}/fg004a_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} FINAL_IMAGE=${DISTDIR}/fg004a_high_power.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
endif endif
ifeq ($(COMPARE_BUILD), true) ifeq ($(COMPARE_BUILD), true)
@ -82,80 +82,80 @@ FIXDEPS=fixDeps
ifneq ($(INFORMATION_MESSAGE), ) ifneq ($(INFORMATION_MESSAGE), )
@echo $(INFORMATION_MESSAGE) @echo $(INFORMATION_MESSAGE)
endif endif
${MAKE} -f nbproject/Makefile-attiny404.mk ${DISTDIR}/fg004a_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} ${MAKE} -f nbproject/Makefile-attiny404.mk ${DISTDIR}/fg004a_high_power.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
MP_PROCESSOR_OPTION=ATtiny404 MP_PROCESSOR_OPTION=ATtiny404
# ------------------------------------------------------------------------------------ # ------------------------------------------------------------------------------------
# Rules for buildStep: compile # Rules for buildStep: compile
ifeq ($(TYPE_IMAGE), DEBUG_RUN) ifeq ($(TYPE_IMAGE), DEBUG_RUN)
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@${RM} ${OBJECTDIR}/TriacOut.o.d @${RM} ${OBJECTDIR}/TriacOut.o.d
@${RM} ${OBJECTDIR}/TriacOut.o @${RM} ${OBJECTDIR}/TriacOut.o
${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O1 -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -Wall -DXPRJ_attiny404=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -mno-const-data-in-progmem -MD -MP -MF "${OBJECTDIR}/TriacOut.o.d" -MT "${OBJECTDIR}/TriacOut.o.d" -MT ${OBJECTDIR}/TriacOut.o -o ${OBJECTDIR}/TriacOut.o TriacOut.c ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O1 -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -Wall -DXPRJ_attiny404=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -mno-const-data-in-progmem -MD -MP -MF "${OBJECTDIR}/TriacOut.o.d" -MT "${OBJECTDIR}/TriacOut.o.d" -MT ${OBJECTDIR}/TriacOut.o -o ${OBJECTDIR}/TriacOut.o TriacOut.c
${OBJECTDIR}/zero_cross_detection.o: zero_cross_detection.c .generated_files/flags/attiny404/4ee41962ee462e1b43db78ddddd0ee1a7619a9fa .generated_files/flags/attiny404/da39a3ee5e6b4b0d3255bfef95601890afd80709 ${OBJECTDIR}/zero_cross_detection.o: zero_cross_detection.c .generated_files/flags/attiny404/5d97c5267af165ce3dc277e265b0185d1683961 .generated_files/flags/attiny404/da39a3ee5e6b4b0d3255bfef95601890afd80709
@${MKDIR} "${OBJECTDIR}" @${MKDIR} "${OBJECTDIR}"
@${RM} ${OBJECTDIR}/zero_cross_detection.o.d @${RM} ${OBJECTDIR}/zero_cross_detection.o.d
@${RM} ${OBJECTDIR}/zero_cross_detection.o @${RM} ${OBJECTDIR}/zero_cross_detection.o
${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O1 -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -Wall -DXPRJ_attiny404=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -mno-const-data-in-progmem -MD -MP -MF "${OBJECTDIR}/zero_cross_detection.o.d" -MT "${OBJECTDIR}/zero_cross_detection.o.d" -MT ${OBJECTDIR}/zero_cross_detection.o -o ${OBJECTDIR}/zero_cross_detection.o zero_cross_detection.c ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O1 -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -Wall -DXPRJ_attiny404=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -mno-const-data-in-progmem -MD -MP -MF "${OBJECTDIR}/zero_cross_detection.o.d" -MT "${OBJECTDIR}/zero_cross_detection.o.d" -MT ${OBJECTDIR}/zero_cross_detection.o -o ${OBJECTDIR}/zero_cross_detection.o zero_cross_detection.c
${OBJECTDIR}/load.o: load.c .generated_files/flags/attiny404/ed741808f7f01207d533233eede6370ae89b6d03 .generated_files/flags/attiny404/da39a3ee5e6b4b0d3255bfef95601890afd80709 ${OBJECTDIR}/load.o: load.c .generated_files/flags/attiny404/414caa6d53ccf6bd6a6a12f60db96a6b56d5f5ba .generated_files/flags/attiny404/da39a3ee5e6b4b0d3255bfef95601890afd80709
@${MKDIR} "${OBJECTDIR}" @${MKDIR} "${OBJECTDIR}"
@${RM} ${OBJECTDIR}/load.o.d @${RM} ${OBJECTDIR}/load.o.d
@${RM} ${OBJECTDIR}/load.o @${RM} ${OBJECTDIR}/load.o
@ -178,17 +178,17 @@ endif
# ------------------------------------------------------------------------------------ # ------------------------------------------------------------------------------------
# Rules for buildStep: link # Rules for buildStep: link
ifeq ($(TYPE_IMAGE), DEBUG_RUN) ifeq ($(TYPE_IMAGE), DEBUG_RUN)
${DISTDIR}/fg004a_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES} nbproject/Makefile-${CND_CONF}.mk ${DISTDIR}/fg004a_high_power.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES} nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} ${DISTDIR} @${MKDIR} ${DISTDIR}
${MP_CC} $(MP_EXTRA_LD_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -Wl,-Map=${DISTDIR}/fg004a_test.X.${IMAGE_TYPE}.map -D__DEBUG=1 -DXPRJ_attiny404=$(CND_CONF) -Wl,--defsym=__MPLAB_BUILD=1 -mdfp="${DFP_DIR}/xc8" -gdwarf-2 -Wl,--gc-sections -O1 -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -Wall -gdwarf-3 -mno-const-data-in-progmem $(COMPARISON_BUILD) -Wl,--memorysummary,${DISTDIR}/memoryfile.xml -o ${DISTDIR}/fg004a_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} -o ${DISTDIR}/fg004a_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED} -Wl,--start-group -Wl,-lm -Wl,--end-group -Wl,--defsym=__MPLAB_DEBUG=1,--defsym=__DEBUG=1 ${MP_CC} $(MP_EXTRA_LD_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -Wl,-Map=${DISTDIR}/fg004a_high_power.X.${IMAGE_TYPE}.map -D__DEBUG=1 -DXPRJ_attiny404=$(CND_CONF) -Wl,--defsym=__MPLAB_BUILD=1 -mdfp="${DFP_DIR}/xc8" -gdwarf-2 -Wl,--gc-sections -O1 -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -Wall -gdwarf-3 -mno-const-data-in-progmem $(COMPARISON_BUILD) -Wl,--memorysummary,${DISTDIR}/memoryfile.xml -o ${DISTDIR}/fg004a_high_power.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} -o ${DISTDIR}/fg004a_high_power.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED} -Wl,--start-group -Wl,-lm -Wl,--end-group -Wl,--defsym=__MPLAB_DEBUG=1,--defsym=__DEBUG=1
@${RM} ${DISTDIR}/fg004a_test.X.${IMAGE_TYPE}.hex @${RM} ${DISTDIR}/fg004a_high_power.X.${IMAGE_TYPE}.hex
else else
${DISTDIR}/fg004a_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES} nbproject/Makefile-${CND_CONF}.mk ${DISTDIR}/fg004a_high_power.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES} nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} ${DISTDIR} @${MKDIR} ${DISTDIR}
${MP_CC} $(MP_EXTRA_LD_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -Wl,-Map=${DISTDIR}/fg004a_test.X.${IMAGE_TYPE}.map -DXPRJ_attiny404=$(CND_CONF) -Wl,--defsym=__MPLAB_BUILD=1 -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O1 -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -Wall -gdwarf-3 -mno-const-data-in-progmem $(COMPARISON_BUILD) -Wl,--memorysummary,${DISTDIR}/memoryfile.xml -o ${DISTDIR}/fg004a_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} -o ${DISTDIR}/fg004a_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED} -Wl,--start-group -Wl,-lm -Wl,--end-group ${MP_CC} $(MP_EXTRA_LD_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -Wl,-Map=${DISTDIR}/fg004a_high_power.X.${IMAGE_TYPE}.map -DXPRJ_attiny404=$(CND_CONF) -Wl,--defsym=__MPLAB_BUILD=1 -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O1 -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -Wall -gdwarf-3 -mno-const-data-in-progmem $(COMPARISON_BUILD) -Wl,--memorysummary,${DISTDIR}/memoryfile.xml -o ${DISTDIR}/fg004a_high_power.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} -o ${DISTDIR}/fg004a_high_power.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED} -Wl,--start-group -Wl,-lm -Wl,--end-group
${MP_CC_DIR}/avr-objcopy -O ihex "${DISTDIR}/fg004a_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX}" "${DISTDIR}/fg004a_test.X.${IMAGE_TYPE}.hex" ${MP_CC_DIR}/avr-objcopy -O ihex "${DISTDIR}/fg004a_high_power.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX}" "${DISTDIR}/fg004a_high_power.X.${IMAGE_TYPE}.hex"
endif endif

View File

@ -1,5 +1,5 @@
# #
#Wed Jul 10 08:03:09 PDT 2024 #Sat Jul 20 10:18:22 PDT 2024
attiny404.languagetoolchain.version=2.46 attiny404.languagetoolchain.version=2.46
attiny404.com-microchip-mplab-nbide-toolchain-xc8-XC8LanguageToolchain.md5=bf89cdcdd6c0a49174fe4b605ef2b42d attiny404.com-microchip-mplab-nbide-toolchain-xc8-XC8LanguageToolchain.md5=bf89cdcdd6c0a49174fe4b605ef2b42d
conf.ids=,attiny404 conf.ids=,attiny404
@ -8,6 +8,6 @@ configurations-xml=a2902459fa41badc4b7c9fbc5e9c3988
attiny404.platformTool.md5=null attiny404.platformTool.md5=null
com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=f612087c95360c842296d189edfe3321 com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=f612087c95360c842296d189edfe3321
attiny404.languagetoolchain.dir=/opt/microchip/xc8/v2.46/bin attiny404.languagetoolchain.dir=/opt/microchip/xc8/v2.46/bin
proj.dir=/home/ronin/Documents/projects/freelance/laith_naaman/fg004a_test.X proj.dir=/home/ronin/Documents/projects/freelance/laith_naaman/fg004a_high_power.X
attiny404.Pack.dfplocation=/opt/microchip/mplabx/v6.20/packs/Microchip/ATtiny_DFP/3.1.260 attiny404.Pack.dfplocation=/opt/microchip/mplabx/v6.20/packs/Microchip/ATtiny_DFP/3.1.260
host.platform=linux host.platform=linux

View File

@ -24,7 +24,7 @@ CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
# Project Name # Project Name
PROJECTNAME=fg004a_test.X PROJECTNAME=fg004a_high_power.X
# Active Configuration # Active Configuration
DEFAULTCONF=attiny404 DEFAULTCONF=attiny404

View File

@ -6,9 +6,9 @@
CND_BASEDIR=`pwd` CND_BASEDIR=`pwd`
# default configuration # default configuration
CND_ARTIFACT_DIR_default=dist/default/production CND_ARTIFACT_DIR_default=dist/default/production
CND_ARTIFACT_NAME_default=fg004a_test.X.production.hex CND_ARTIFACT_NAME_default=fg004a_high_power.X.production.hex
CND_ARTIFACT_PATH_default=dist/default/production/fg004a_test.X.production.hex CND_ARTIFACT_PATH_default=dist/default/production/fg004a_high_power.X.production.hex
# attiny404 configuration # attiny404 configuration
CND_ARTIFACT_DIR_attiny404=dist/attiny404/production CND_ARTIFACT_DIR_attiny404=dist/attiny404/production
CND_ARTIFACT_NAME_attiny404=fg004a_test.X.production.hex CND_ARTIFACT_NAME_attiny404=fg004a_high_power.X.production.hex
CND_ARTIFACT_PATH_attiny404=dist/attiny404/production/fg004a_test.X.production.hex CND_ARTIFACT_PATH_attiny404=dist/attiny404/production/fg004a_high_power.X.production.hex