Added more comments
Added comments about M3/M4 cpu and alignment requirements.
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29
linker.ld
29
linker.ld
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@ -1,6 +1,8 @@
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/*
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* Filename: linker.ld
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* Micro-Controller: stm32f103c8t6
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* Cortex-M3 and Cortex-M4 only need to be 4byte aligned where as
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* other's might need 8byte or something differnt.
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*/
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@ -66,29 +68,30 @@ SECTIONS
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} > RAM AT > FLASH
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/* BSS: Placed in SRAM memory types. */
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/* Holds all uninitialized globals and static variables.*/
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.bss :
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{
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_sbss = .; /* */
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*(.bss) /**/
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*(COMMON) /**/
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_ebss = .; /**/
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_sbss = .; /* Start of BSS */
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*(.bss) /* Uninitialized data */
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*(COMMON) /* Common symbols (zero-init) */
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_ebss = .; /* End of BSS */
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} > RAM
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/* Stack Section: */
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/* Stack Section: Sizes known at compile time. */
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._stack :
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{
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. = ALIGN(8); /**/
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_estack = .; /**/
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. = . + 2048; /**/
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_sstack = .; /**/
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. = ALIGN(8); /* Align to 8-byte boundry */
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_estack = .; /* End of stack (top of the stack) */
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. = . + 2048; /* Reserve 2KB for stack */
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_sstack = .; /*Start of stack */
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} > RAM
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/* Heap Section: */
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/* Heap Section: Used for dynamic memory allocation. */
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.heap :
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{
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_sheap = .; /**/
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. = . + 2048; /**/
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_eheap = .; /**/
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_sheap = .; /* Start of heap */
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. = . + 2048; /* Reserve 2 KB for heap */
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_eheap = .; /* End of heap */
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} > RAM
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}
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