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No commits in common. "1ab0edaf2429c57a3cf64340bb781b4cb0c9d566" and "7e0b1e3244228576d1f74df7543e67c8f49a5910" have entirely different histories.

5 changed files with 22 additions and 38 deletions

View file

@ -218,8 +218,8 @@ typedef struct
{ {
__I uint16_t REVID; __I uint16_t REVID;
__I uint16_t DEVID; __I uint16_t DEVID;
}s; };
}u; };
} INFO_TypeDef; } INFO_TypeDef;
/* General Purpose I/O */ /* General Purpose I/O */
@ -257,7 +257,7 @@ typedef union {
GPIO_CFGLR_PIN_MODE_Typedef PIN5 :4; GPIO_CFGLR_PIN_MODE_Typedef PIN5 :4;
GPIO_CFGLR_PIN_MODE_Typedef PIN6 :4; GPIO_CFGLR_PIN_MODE_Typedef PIN6 :4;
GPIO_CFGLR_PIN_MODE_Typedef PIN7 :4; GPIO_CFGLR_PIN_MODE_Typedef PIN7 :4;
}s; };
} GPIO_CFGLR_t; } GPIO_CFGLR_t;
typedef union { typedef union {
uint32_t __FULL; uint32_t __FULL;
@ -271,7 +271,7 @@ typedef union {
uint32_t IDR6 :1; uint32_t IDR6 :1;
uint32_t IDR7 :1; uint32_t IDR7 :1;
uint32_t :24; uint32_t :24;
}s; };
} GPIO_INDR_t; } GPIO_INDR_t;
typedef union { typedef union {
uint32_t __FULL; uint32_t __FULL;
@ -285,7 +285,7 @@ typedef union {
uint32_t ODR6 :1; uint32_t ODR6 :1;
uint32_t ODR7 :1; uint32_t ODR7 :1;
uint32_t :24; uint32_t :24;
}s; };
} GPIO_OUTDR_t; } GPIO_OUTDR_t;
typedef union { typedef union {
uint32_t __FULL; uint32_t __FULL;
@ -308,7 +308,7 @@ typedef union {
uint32_t BR6 :1; uint32_t BR6 :1;
uint32_t BR7 :1; uint32_t BR7 :1;
uint32_t :8; uint32_t :8;
}s; };
} GPIO_BSHR_t; } GPIO_BSHR_t;
typedef union { typedef union {
uint32_t __FULL; uint32_t __FULL;
@ -322,7 +322,7 @@ typedef union {
uint32_t BR6 :1; uint32_t BR6 :1;
uint32_t BR7 :1; uint32_t BR7 :1;
uint32_t :24; uint32_t :24;
}s; };
} GPIO_BCR_t; } GPIO_BCR_t;
typedef union { typedef union {
uint32_t __FULL; uint32_t __FULL;
@ -337,7 +337,7 @@ typedef union {
uint32_t LCK7 :1; uint32_t LCK7 :1;
uint32_t LCKK :1; uint32_t LCKK :1;
uint32_t :23; uint32_t :23;
}s; };
} GPIO_LCKR_t; } GPIO_LCKR_t;
typedef struct typedef struct
{ {

View file

@ -50,11 +50,6 @@ void ADC_PowerOn(void)
RegEdit_u32_SetBit((void *)&ADC1->CTLR2, ADC_ADON); RegEdit_u32_SetBit((void *)&ADC1->CTLR2, ADC_ADON);
} }
void ADC_PowerOff(void)
{
RegEdit_u32_ClearBit((void *)&ADC1->CTLR2, ADC_ADON);
}
void ADC_Init(uint8_t pin_num) void ADC_Init(uint8_t pin_num)
{ {
if (IsInvalidPin(pin_num)) if (IsInvalidPin(pin_num))

View file

@ -33,8 +33,6 @@ void ADC_Init(uint8_t pin_num);
*/ */
void ADC_PowerOn(void); void ADC_PowerOn(void);
void ADC_PowerOff(void);
/** /**
* @brief Enables the ADC * @brief Enables the ADC
*/ */

View file

@ -2,10 +2,10 @@
* Author: Jake G * Author: Jake G
* Date: 2025 * Date: 2025
* filename: test_ADC.c * filename: test_ADC.c
* description: Test groups for the ADC module. * description: module_purpose
*/ */
//#include "CppUTest/CommandLineTestRunner.h" #include "CppUTest/CommandLineTestRunner.h"
#include "CppUTestExt/MockSupport.h" #include "CppUTestExt/MockSupport.h"
#include <cstdint> #include <cstdint>
@ -15,7 +15,7 @@ extern "C"
#include "ch32v003hw.h" #include "ch32v003hw.h"
} }
TEST_GROUP(tg_ADC) TEST_GROUP(test_ADC)
{ {
void setup(){ void setup(){
@ -27,12 +27,12 @@ TEST_GROUP(tg_ADC)
} }
}; };
TEST(tg_ADC, FirstTest) TEST(test_ADC, FirstTest)
{ {
CHECK(true); CHECK(true);
} }
TEST(tg_ADC, ADC_PowerOnTest) TEST(test_ADC, ADC_PowerOnTest)
{ {
// The ADCON bit should be high in the ADC_CTRL2 register. // The ADCON bit should be high in the ADC_CTRL2 register.
mock().expectOneCall("RegEdit_u32_SetBit").withPointerParameter("reg", (void *)&ADC1->CTLR2).withUnsignedIntParameter("bit_num", ADC_ADON); mock().expectOneCall("RegEdit_u32_SetBit").withPointerParameter("reg", (void *)&ADC1->CTLR2).withUnsignedIntParameter("bit_num", ADC_ADON);
@ -40,16 +40,7 @@ TEST(tg_ADC, ADC_PowerOnTest)
ADC_PowerOn(); ADC_PowerOn();
} }
TEST(tg_ADC, ADC_PowerOffTest) TEST(test_ADC, ADC_SetupSetsRegisters)
{
mock().expectOneCall("RegEdit_u32_ClearBit")
.withPointerParameter("reg", (void *)&ADC1->CTLR2)
.withUnsignedIntParameter("bit_num", ADC_ADON);
ADC_PowerOff();
}
TEST(tg_ADC, ADC_SetupSetsRegisters)
{ {
// R32_GPIOD_CFGLR --> 0x40011400 // R32_GPIOD_CFGLR --> 0x40011400
// DESC: PD port configuration register low // DESC: PD port configuration register low
@ -106,7 +97,7 @@ TEST(tg_ADC, ADC_SetupSetsRegisters)
ADC_Setup(); ADC_Setup();
} }
TEST(tg_ADC, ADC_InitPortAPin7UsesCorrectRegisters) TEST(test_ADC, ADC_InitPortAPin7UsesCorrectRegisters)
{ {
/* /*
//Check for setting the direction to input. //Check for setting the direction to input.
@ -129,7 +120,7 @@ TEST(tg_ADC, ADC_InitPortAPin7UsesCorrectRegisters)
ADC_Init(7); ADC_Init(7);
} }
TEST(tg_ADC, ADC_InitPortAPin0UsesCorrectRegisters) TEST(test_ADC, ADC_InitPortAPin0UsesCorrectRegisters)
{ {
/* /*
//Check for setting the direction to input. //Check for setting the direction to input.
@ -153,13 +144,13 @@ TEST(tg_ADC, ADC_InitPortAPin0UsesCorrectRegisters)
ADC_Init(0); ADC_Init(0);
} }
TEST(tg_ADC, ADC_InitDoesNothingOnHighPinNumbers) TEST(test_ADC, ADC_InitDoesNothingOnHighPinNumbers)
{ {
// mock().expectNoCall("RegEdit_SetBit"); // mock().expectNoCall("RegEdit_SetBit");
ADC_Init(8); ADC_Init(8);
} }
TEST(tg_ADC, ADC_EnablePasses) TEST(test_ADC, ADC_EnablePasses)
{ {
/* /*
mock().expectOneCall("RegEdit_SetBit") mock().expectOneCall("RegEdit_SetBit")
@ -170,7 +161,7 @@ TEST(tg_ADC, ADC_EnablePasses)
ADC_Enable(); ADC_Enable();
} }
TEST(tg_ADC, ADC_DisablePasses) TEST(test_ADC, ADC_DisablePasses)
{ {
/* /*
mock().expectOneCall("RegEdit_ClearBit") mock().expectOneCall("RegEdit_ClearBit")
@ -180,7 +171,7 @@ TEST(tg_ADC, ADC_DisablePasses)
ADC_Disable(); ADC_Disable();
} }
TEST(tg_ADC, ADC_SetPinSetsRightRegisters) TEST(test_ADC, ADC_SetPinSetsRightRegisters)
{ {
/* /*
//It clears existing MUXPOS register values. //It clears existing MUXPOS register values.
@ -196,7 +187,7 @@ TEST(tg_ADC, ADC_SetPinSetsRightRegisters)
ADC_SetPin(4); ADC_SetPin(4);
} }
TEST(tg_ADC, ADC_SetPinFailsOnInvalidPin) TEST(test_ADC, ADC_SetPinFailsOnInvalidPin)
{ {
ADC_SetPin(8); ADC_SetPin(8);
} }

View file

@ -2,7 +2,7 @@
// ImportTestGroups // ImportTestGroups
IMPORT_TEST_GROUP(simple_test); IMPORT_TEST_GROUP(simple_test);
IMPORT_TEST_GROUP(tg_ADC); IMPORT_TEST_GROUP(test_ADC);
IMPORT_TEST_GROUP(test_RegEdit); IMPORT_TEST_GROUP(test_RegEdit);
IMPORT_TEST_GROUP(test_blink); IMPORT_TEST_GROUP(test_blink);