inc/ch32v003hw.h

@@ -227,8 +227,8 @@ extern "C"
             {
                 __I uint16_t REVID;
                 __I uint16_t DEVID;
-            }s;
-        }u;
+            };
+        };
     } INFO_TypeDef;
 
     /* General Purpose I/O */
@@ -264,7 +264,7 @@ extern "C"
             GPIO_CFGLR_PIN_MODE_Typedef PIN5 : 4;
             GPIO_CFGLR_PIN_MODE_Typedef PIN6 : 4;
             GPIO_CFGLR_PIN_MODE_Typedef PIN7 : 4;
-        }s;
+        };
     } GPIO_CFGLR_t;
     typedef union
     {
@@ -280,7 +280,7 @@ extern "C"
             uint32_t IDR6 : 1;
             uint32_t IDR7 : 1;
             uint32_t      : 24;
-        }s;
+        };
     } GPIO_INDR_t;
     typedef union
     {
@@ -296,7 +296,7 @@ extern "C"
             uint32_t ODR6 : 1;
             uint32_t ODR7 : 1;
             uint32_t      : 24;
-        }s;
+        };
     } GPIO_OUTDR_t;
     typedef union
     {
@@ -321,7 +321,7 @@ extern "C"
             uint32_t BR6 : 1;
             uint32_t BR7 : 1;
             uint32_t     : 8;
-        }s;
+        };
     } GPIO_BSHR_t;
     typedef union
     {
@@ -337,7 +337,7 @@ extern "C"
             uint32_t BR6 : 1;
             uint32_t BR7 : 1;
             uint32_t     : 24;
-        }s;
+        };
     } GPIO_BCR_t;
     typedef union
     {
@@ -354,7 +354,7 @@ extern "C"
             uint32_t LCK7 : 1;
             uint32_t LCKK : 1;
             uint32_t      : 23;
-        }s;
+        };
     } GPIO_LCKR_t;
     typedef struct
     {
@@ -744,9 +744,9 @@ extern "C"
 #define OB ((OB_TypeDef *)OB_BASE)
 #define ESIG ((ESG_TypeDef *)ESIG_BASE)
 // Mentioned in ch32v30x_dbgmcu.c, may not work on all processors.
-//#define INFO ((INFO_TypeDef *)INFO_BASE)
-//#define EXTEN ((EXTEN_TypeDef *)EXTEN_BASE)
-//#define EXTEND ((EXTEND_TypeDef *)EXTEN_BASE) // Alias to EXTEN
+#define INFO ((INFO_TypeDef *)INFO_BASE)
+#define EXTEN ((EXTEN_TypeDef *)EXTEN_BASE)
+#define EXTEND ((EXTEND_TypeDef *)EXTEN_BASE) // Alias to EXTEN
 
 /******************************************************************************/
 /*                         Peripheral Registers Bits Definition               */

mocks/MockADC/MockADC.c

@@ -39,7 +39,7 @@ void ADC_Enable(void)
     mock_c()->actualCall("ADC_Enable");
 }
 
-void ADC_Disable(void)
+void ADC_Disable()
 {
     mock_c()->actualCall("ADC_Disable"); 
 }

src/ADC/ADC.c

@@ -1,13 +1,13 @@
 /*
- * Author: Jake Goodwin
+ * Author: Jake Goodwin 
  * Date: 2025
  * filename: ADC.c
- * description:
+ * description: 
  */
 
 /*DEVNOTES:
- * The CH32v003 micro-controllers have 8channels for the ADC that are
- * external and 2 internal channels.
+ * The CH32v003 micro-controllers have 8channels for the ADC that are 
+ * external and 2 internal channels. 
  *
  * The channels/inputs are labeled as AIN0-AIN7
  */
@@ -20,15 +20,15 @@
  * A4 --> PD3
  * A5 --> PD5
  * A6 --> PD6
- * A7 --> PD4
+ * A7 --> PD4 
  *
- * Because they don't exactly match up, I'll need to write up my own
+ * Because they don't exactly match up, I'll need to write up my own 
  * way to do the mapping.
  */
 
 #include "ADC.h"
 #include "RegEdit.h"
-#include "ch32v003hw.h"
+#include "ch32fun.h"
 
 #define MAX_PIN_NUM 7
 
@@ -45,11 +45,6 @@ void ADC_Setup(void)
 {
 }
 
-void ADC_PowerOn(void)
-{
-    RegEdit_SetBit((void *)&ADC1->CTLR2, ADC_ADON);
-}
-
 void ADC_Init(uint8_t pin_num)
 {
     if (IsInvalidPin(pin_num))

src/ADC/ADC.h

@@ -27,11 +27,6 @@
  */
 void ADC_Init(uint8_t pin_num);
 
-/**
- * @brief Enables the ADC
- */
-void ADC_PowerOn(void);
-
 /**
  * @brief Enables the ADC
  */

tests/ADC/test_ADC.cpp

@@ -33,41 +33,9 @@ TEST(test_ADC, FirstTest)
    CHECK(true);
 }
 
-TEST(test_ADC, ADC_PowerOnTest)
-{
-    // The ADCON bit should be high in the ADC_CTRL2 register.
-   mock().expectOneCall("RegEdit_SetBit")
-       .withPointerParameter("reg", (void *) &ADC1->CTLR2)
-       .withUnsignedIntParameter("bit_num", ADC_ADON); 
-
-    ADC_PowerOn();
-}
 
 TEST(test_ADC, ADC_SetupSetsRegisters)
 {
-    
-    //R32_GPIOD_CFGLR --> 0x40011400
-    //DESC: PD port configuration register low 
-    //RESET VALUE--> 0x44444444
-    
-    //R32_GPIOD_INDR --> 0x40011408
-    //DESC: PD port input data register
-
-    //R32_GPIOD_BSHR --> 0x40011410
-    //DESC: PD port set/reset register
-
-    //R32_GPIOD_BCR --> 0x40011414
-    //DESC: PD port reset register
-    
-    //R32_GPIOD_LCKR --> 0x40011418
-    //DESC: PD port configuration lock register
-
-    //Setup the ADC clock and divider. The internal HSI-XC is 24MHz.
-
-    
-    //Setup PORTD pin(s) as analog input.
-
-
 
     /*
     //Clears control register A for ADC0