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6 commits

Author SHA1 Message Date
jakeg00dwin
4ba6863eae Wrote code to pass new tests for hysteresis 2024-10-18 22:15:45 -07:00
jakeg00dwin
8d7af1d678 Added more port b tests 2024-10-18 22:15:22 -07:00
jakeg00dwin
c2a5e94bae Updated same tests for the port b 2024-10-18 21:52:40 -07:00
jakeg00dwin
0e7deea6e7 Updated tests for the the port a handler function. 2024-10-18 21:44:42 -07:00
jakeg00dwin
3caa74f642 Added the needed defines for the high and low hysteresis points. 2024-10-18 21:43:04 -07:00
jakeg00dwin
b9e85d3719 returning the actual value from the mock. 2024-10-18 21:42:29 -07:00
4 changed files with 138 additions and 39 deletions

View file

@ -75,7 +75,7 @@ void RegEdit_SetNum(void *reg, uint8_t num)
uint8_t RegEdit_ReadReg(void *reg)
{
mock_c()->actualCall("RegEdit_ReadReg")
return mock_c()->actualCall("RegEdit_ReadReg")
->withPointerParameters("reg", reg)
->returnUnsignedIntValueOrDefault(0);
//Return value is mock controlled. So it does actually return a uint8_t

View file

@ -40,7 +40,29 @@ static bool is_valid_load(uint16_t val)
static bool is_below_target(uint16_t val)
{
if(val < HYSTERESIS){
if(val < HYSTERESIS_HI){
return true;
}
return false;
}
static bool is_high_valid(uint16_t val, bool output_level)
{
if(val < HYSTERESIS_LO){
return true;
}
else if(val <= HYSTERESIS_HI && output_level) {
return true;
}
return false;
}
static bool is_low_valid(uint16_t val, bool output_level)
{
if(val > HYSTERESIS_HI) {
return true;
}
else if(val >= HYSTERESIS_HI && output_level) {
return true;
}
return false;
@ -60,18 +82,23 @@ static uint16_t sample_adc(uint8_t adc_pin)
void Load_HandleLoadPortA(uint8_t adc_pin, uint8_t out_pin)
{
uint16_t val = sample_adc(adc_pin);
if(porta_disabled[adc_pin]){
bool out_state = RegEdit_IsBitSet((void *) &PORTA.OUT, out_pin);
if(porta_disabled[adc_pin]) {
RegEdit_ClearBit((void *) &PORTA.OUT, out_pin);
}
else if(!is_valid_load(val)){
else if(!is_valid_load(val)) {
RegEdit_ClearBit((void *) &PORTA.OUT, out_pin);
porta_disabled[adc_pin] = true;
}
else if(is_below_target(val)){
else if(is_high_valid(val, out_state)) {
RegEdit_SetBit((void *) &PORTA.DIR, out_pin);
RegEdit_SetBit((void *) &PORTA.OUT, out_pin);
}
else{
else if(is_low_valid(val, out_pin)) {
RegEdit_ClearBit((void *) &PORTA.OUT, out_pin);
}
else {
RegEdit_ClearBit((void *) &PORTA.OUT, out_pin);
}
}
@ -79,18 +106,23 @@ void Load_HandleLoadPortA(uint8_t adc_pin, uint8_t out_pin)
void Load_HandleLoadPortB(uint8_t adc_pin, uint8_t out_pin)
{
uint16_t val = sample_adc(adc_pin);
if(portb_disabled[adc_pin]){
bool out_state = RegEdit_IsBitSet((void *) &PORTB.OUT, out_pin);
if(portb_disabled[adc_pin]) {
RegEdit_ClearBit((void *) &PORTB.OUT, out_pin);
}
else if(!is_valid_load(val)){
else if(!is_valid_load(val)) {
RegEdit_ClearBit((void *) &PORTB.OUT, out_pin);
portb_disabled[adc_pin] = true;
}
else if(is_below_target(val)) {
else if(is_high_valid(val, out_state)) {
RegEdit_SetBit((void *) &PORTB.DIR, out_pin);
RegEdit_SetBit((void *) &PORTB.OUT, out_pin);
}
else{
else if(is_low_valid(val, out_pin)) {
RegEdit_ClearBit((void *) &PORTB.OUT, out_pin);
}
else {
RegEdit_ClearBit((void *) &PORTB.OUT, out_pin);
}
}

View file

@ -28,10 +28,23 @@
#define HIGHTHRESH 1000
#ifndef HYSTERESIS
#define HYSTERESIS 900
/**
* @brief The upper Hystersis value.
* This is the upper bound of the digital/boolean hysteresis curve.
*/
#ifndef HYSTERESIS_HI
#define HYSTERESIS_HI 900
#endif
/**
* @brief The lower Hystersis value.
* This is the upper bound of the digital/boolean hysteresis curve.
*/
#ifndef HYSTERESIS_LO
#define HYSTERESIS_LO 700
#endif
/**
* @brief Checks if the adc pin is inbetween LOWTHRESH and HIGHTHRESH and then
* sets or disables the output pin on PORTA.

View file

@ -18,7 +18,6 @@ extern "C"
#include <iotn404.h> //ATtiny404 header fille.
#include "load.h"
#include "MockADC.h"
#include "MockADC.h"
}
TEST_GROUP(test_load)
@ -55,15 +54,25 @@ void setup_adc_expectations(uint8_t adc_pin)
mock().expectOneCall("ADC_Disable");
}
void expect_porta_disabled(uint8_t load_pin)
void expect_porta_disabled(uint8_t load_pin, bool output_level)
{
mock().expectOneCall("RegEdit_IsBitSet")
.withPointerParameter("reg", (void *) &PORTA.OUT)
.withUnsignedIntParameter("bit_num", load_pin)
.andReturnValue(output_level);
mock().expectOneCall("RegEdit_ClearBit")
.withPointerParameter("reg", (void *) &PORTA.OUT)
.withUnsignedIntParameter("bit_num", load_pin);
}
void expect_porta_enabled(uint8_t load_pin)
void expect_porta_enabled(uint8_t load_pin, bool output_level)
{
mock().expectOneCall("RegEdit_IsBitSet")
.withPointerParameter("reg", (void *) &PORTA.OUT)
.withUnsignedIntParameter("bit_num", load_pin)
.andReturnValue(output_level);
mock().expectOneCall("RegEdit_SetBit")
.withPointerParameter("reg", (void *) &PORTA.DIR)
.withUnsignedIntParameter("bit_num", load_pin);
@ -73,16 +82,26 @@ void expect_porta_enabled(uint8_t load_pin)
.withUnsignedIntParameter("bit_num", load_pin);
}
void expect_portb_disabled(uint8_t load_pin)
void expect_portb_disabled(uint8_t load_pin, bool output_level)
{
mock().expectOneCall("RegEdit_IsBitSet")
.withPointerParameter("reg", (void *) &PORTB.OUT)
.withUnsignedIntParameter("bit_num", load_pin)
.andReturnValue(output_level);
mock().expectOneCall("RegEdit_ClearBit")
.withPointerParameter("reg", (void *) &PORTB.OUT)
.withUnsignedIntParameter("bit_num", load_pin);
}
void expect_portb_enabled(uint8_t load_pin)
void expect_portb_enabled(uint8_t load_pin, bool output_level)
{
mock().expectOneCall("RegEdit_IsBitSet")
.withPointerParameter("reg", (void *) &PORTB.OUT)
.withUnsignedIntParameter("bit_num", load_pin)
.andReturnValue(output_level);
mock().expectOneCall("RegEdit_SetBit")
.withPointerParameter("reg", (void *) &PORTB.DIR)
.withUnsignedIntParameter("bit_num", load_pin);
@ -97,7 +116,7 @@ TEST(test_load, PortAHandlerDisabledHigh)
MockADC_PushValue(HIGHTHRESH);
setup_adc_expectations(adc_pin);
expect_porta_disabled(load_pin);
expect_porta_disabled(load_pin, true);
Load_HandleLoadPortA(adc_pin, load_pin);
}
@ -107,41 +126,53 @@ TEST(test_load, PortAHandlerDisabledLow)
MockADC_PushValue(LOWTHRESH);
setup_adc_expectations(adc_pin);
expect_porta_disabled(load_pin);
expect_porta_disabled(load_pin, false);
Load_HandleLoadPortA(adc_pin, load_pin);
}
TEST(test_load, PortAHandlerEnabledBelowTarget)
TEST(test_load, PortAHandlerEnabledRisingEdgeLO)
{
MockADC_PushValue(HYSTERESIS - 1);
//Start from the rising edge.
MockADC_PushValue(HYSTERESIS_LO - 1);
setup_adc_expectations(adc_pin);
expect_porta_enabled(load_pin);
expect_porta_enabled(load_pin, false);
Load_HandleLoadPortA(adc_pin, load_pin);
}
TEST(test_load, PortAHandlerEnabledRisingEdgeHI)
{
//Start from the rising edge above lo.
MockADC_PushValue(HYSTERESIS_HI - 1);
setup_adc_expectations(adc_pin);
expect_porta_enabled(load_pin, true);
Load_HandleLoadPortA(adc_pin, load_pin);
}
TEST(test_load, PortAHandlerDisabledAboveTarget)
{
MockADC_PushValue(HYSTERESIS);
MockADC_PushValue(HYSTERESIS_HI + 1);
setup_adc_expectations(adc_pin);
expect_porta_disabled(load_pin);
expect_porta_disabled(load_pin, true);
Load_HandleLoadPortA(adc_pin, load_pin);
}
TEST(test_load, PortAHandlerDisablesUntilPoweReset)
{
MockADC_PushValue(HYSTERESIS - 1);
MockADC_PushValue(HYSTERESIS_HI - 1);
MockADC_PushValue(HIGHTHRESH);
setup_adc_expectations(adc_pin);
expect_porta_disabled(load_pin);
expect_porta_disabled(load_pin, true);
setup_adc_expectations(adc_pin);
expect_porta_disabled(load_pin);
expect_porta_disabled(load_pin, false);
Load_HandleLoadPortA(adc_pin, load_pin);
Load_HandleLoadPortA(adc_pin, load_pin);
@ -153,7 +184,7 @@ TEST(test_load, PortBHandlerDisabledHigh)
MockADC_PushValue(HIGHTHRESH);
setup_adc_expectations(adc_pin);
expect_portb_disabled(load_pin);
expect_portb_disabled(load_pin, true);
Load_HandleLoadPortB(adc_pin, load_pin);
}
@ -163,43 +194,66 @@ TEST(test_load, PortBHandlerDisabledLow)
MockADC_PushValue(LOWTHRESH);
setup_adc_expectations(adc_pin);
expect_portb_disabled(load_pin);
expect_portb_disabled(load_pin, false);
Load_HandleLoadPortB(adc_pin, load_pin);
}
TEST(test_load, PortBHandlerEnabledBelowTarget)
TEST(test_load, PortBHandlerEnabledRisingEdgeLO)
{
MockADC_PushValue(HYSTERESIS - 1);
//Start from the rising edge.
MockADC_PushValue(HYSTERESIS_LO - 1);
setup_adc_expectations(adc_pin);
expect_portb_enabled(load_pin);
expect_portb_enabled(load_pin, false);
Load_HandleLoadPortB(adc_pin, load_pin);
}
TEST(test_load, PortBHandlerDisabledAboveTarget)
TEST(test_load, PortBHandlerEnabledRisingEdgeHI)
{
MockADC_PushValue(HYSTERESIS);
//Start from the rising edge.
MockADC_PushValue(HYSTERESIS_HI - 1);
setup_adc_expectations(adc_pin);
expect_portb_disabled(load_pin);
expect_portb_enabled(load_pin, true);
Load_HandleLoadPortB(adc_pin, load_pin);
}
TEST(test_load, PortBHandlerDisableFallingEdgeLO)
{
//Start from the falling edge.
MockADC_PushValue(HYSTERESIS_LO + 1);
setup_adc_expectations(adc_pin);
expect_portb_disabled(load_pin, false);
Load_HandleLoadPortB(adc_pin, load_pin);
}
TEST(test_load, PortBHandlerDisableFallingEdgeHI)
{
//Start from the falling edge.
MockADC_PushValue(HYSTERESIS_HI + 1);
setup_adc_expectations(adc_pin);
expect_portb_disabled(load_pin, false);
Load_HandleLoadPortB(adc_pin, load_pin);
}
TEST(test_load, PortBHandlerDisablesUntilPoweReset)
{
MockADC_PushValue(HYSTERESIS - 1);
MockADC_PushValue(HYSTERESIS_HI - 1);
MockADC_PushValue(HIGHTHRESH);
setup_adc_expectations(adc_pin);
expect_portb_disabled(load_pin);
expect_portb_disabled(load_pin, true);
setup_adc_expectations(adc_pin);
expect_portb_disabled(load_pin);
expect_portb_disabled(load_pin, false);
Load_HandleLoadPortB(adc_pin, load_pin);
Load_HandleLoadPortB(adc_pin, load_pin);