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No commits in common. "4ba6863eaea03800aa524332e15e0d001a0d28e4" and "156dfb6e095aeaadc6df16e690a828d7e3ef6b51" have entirely different histories.

4 changed files with 39 additions and 138 deletions

View file

@ -75,7 +75,7 @@ void RegEdit_SetNum(void *reg, uint8_t num)
uint8_t RegEdit_ReadReg(void *reg)
{
return mock_c()->actualCall("RegEdit_ReadReg")
mock_c()->actualCall("RegEdit_ReadReg")
->withPointerParameters("reg", reg)
->returnUnsignedIntValueOrDefault(0);
//Return value is mock controlled. So it does actually return a uint8_t

View file

@ -40,29 +40,7 @@ static bool is_valid_load(uint16_t val)
static bool is_below_target(uint16_t val)
{
if(val < HYSTERESIS_HI){
return true;
}
return false;
}
static bool is_high_valid(uint16_t val, bool output_level)
{
if(val < HYSTERESIS_LO){
return true;
}
else if(val <= HYSTERESIS_HI && output_level) {
return true;
}
return false;
}
static bool is_low_valid(uint16_t val, bool output_level)
{
if(val > HYSTERESIS_HI) {
return true;
}
else if(val >= HYSTERESIS_HI && output_level) {
if(val < HYSTERESIS){
return true;
}
return false;
@ -82,23 +60,18 @@ static uint16_t sample_adc(uint8_t adc_pin)
void Load_HandleLoadPortA(uint8_t adc_pin, uint8_t out_pin)
{
uint16_t val = sample_adc(adc_pin);
bool out_state = RegEdit_IsBitSet((void *) &PORTA.OUT, out_pin);
if(porta_disabled[adc_pin]) {
if(porta_disabled[adc_pin]){
RegEdit_ClearBit((void *) &PORTA.OUT, out_pin);
}
else if(!is_valid_load(val)) {
else if(!is_valid_load(val)){
RegEdit_ClearBit((void *) &PORTA.OUT, out_pin);
porta_disabled[adc_pin] = true;
}
else if(is_high_valid(val, out_state)) {
else if(is_below_target(val)){
RegEdit_SetBit((void *) &PORTA.DIR, out_pin);
RegEdit_SetBit((void *) &PORTA.OUT, out_pin);
}
else if(is_low_valid(val, out_pin)) {
RegEdit_ClearBit((void *) &PORTA.OUT, out_pin);
}
else {
else{
RegEdit_ClearBit((void *) &PORTA.OUT, out_pin);
}
}
@ -106,23 +79,18 @@ void Load_HandleLoadPortA(uint8_t adc_pin, uint8_t out_pin)
void Load_HandleLoadPortB(uint8_t adc_pin, uint8_t out_pin)
{
uint16_t val = sample_adc(adc_pin);
bool out_state = RegEdit_IsBitSet((void *) &PORTB.OUT, out_pin);
if(portb_disabled[adc_pin]) {
if(portb_disabled[adc_pin]){
RegEdit_ClearBit((void *) &PORTB.OUT, out_pin);
}
else if(!is_valid_load(val)) {
else if(!is_valid_load(val)){
RegEdit_ClearBit((void *) &PORTB.OUT, out_pin);
portb_disabled[adc_pin] = true;
}
else if(is_high_valid(val, out_state)) {
else if(is_below_target(val)) {
RegEdit_SetBit((void *) &PORTB.DIR, out_pin);
RegEdit_SetBit((void *) &PORTB.OUT, out_pin);
}
else if(is_low_valid(val, out_pin)) {
RegEdit_ClearBit((void *) &PORTB.OUT, out_pin);
}
else {
else{
RegEdit_ClearBit((void *) &PORTB.OUT, out_pin);
}
}

View file

@ -28,23 +28,10 @@
#define HIGHTHRESH 1000
/**
* @brief The upper Hystersis value.
* This is the upper bound of the digital/boolean hysteresis curve.
*/
#ifndef HYSTERESIS_HI
#define HYSTERESIS_HI 900
#ifndef HYSTERESIS
#define HYSTERESIS 900
#endif
/**
* @brief The lower Hystersis value.
* This is the upper bound of the digital/boolean hysteresis curve.
*/
#ifndef HYSTERESIS_LO
#define HYSTERESIS_LO 700
#endif
/**
* @brief Checks if the adc pin is inbetween LOWTHRESH and HIGHTHRESH and then
* sets or disables the output pin on PORTA.

View file

@ -18,6 +18,7 @@ extern "C"
#include <iotn404.h> //ATtiny404 header fille.
#include "load.h"
#include "MockADC.h"
#include "MockADC.h"
}
TEST_GROUP(test_load)
@ -54,25 +55,15 @@ void setup_adc_expectations(uint8_t adc_pin)
mock().expectOneCall("ADC_Disable");
}
void expect_porta_disabled(uint8_t load_pin, bool output_level)
void expect_porta_disabled(uint8_t load_pin)
{
mock().expectOneCall("RegEdit_IsBitSet")
.withPointerParameter("reg", (void *) &PORTA.OUT)
.withUnsignedIntParameter("bit_num", load_pin)
.andReturnValue(output_level);
mock().expectOneCall("RegEdit_ClearBit")
.withPointerParameter("reg", (void *) &PORTA.OUT)
.withUnsignedIntParameter("bit_num", load_pin);
}
void expect_porta_enabled(uint8_t load_pin, bool output_level)
void expect_porta_enabled(uint8_t load_pin)
{
mock().expectOneCall("RegEdit_IsBitSet")
.withPointerParameter("reg", (void *) &PORTA.OUT)
.withUnsignedIntParameter("bit_num", load_pin)
.andReturnValue(output_level);
mock().expectOneCall("RegEdit_SetBit")
.withPointerParameter("reg", (void *) &PORTA.DIR)
.withUnsignedIntParameter("bit_num", load_pin);
@ -82,26 +73,16 @@ void expect_porta_enabled(uint8_t load_pin, bool output_level)
.withUnsignedIntParameter("bit_num", load_pin);
}
void expect_portb_disabled(uint8_t load_pin, bool output_level)
void expect_portb_disabled(uint8_t load_pin)
{
mock().expectOneCall("RegEdit_IsBitSet")
.withPointerParameter("reg", (void *) &PORTB.OUT)
.withUnsignedIntParameter("bit_num", load_pin)
.andReturnValue(output_level);
mock().expectOneCall("RegEdit_ClearBit")
.withPointerParameter("reg", (void *) &PORTB.OUT)
.withUnsignedIntParameter("bit_num", load_pin);
}
void expect_portb_enabled(uint8_t load_pin, bool output_level)
void expect_portb_enabled(uint8_t load_pin)
{
mock().expectOneCall("RegEdit_IsBitSet")
.withPointerParameter("reg", (void *) &PORTB.OUT)
.withUnsignedIntParameter("bit_num", load_pin)
.andReturnValue(output_level);
mock().expectOneCall("RegEdit_SetBit")
.withPointerParameter("reg", (void *) &PORTB.DIR)
.withUnsignedIntParameter("bit_num", load_pin);
@ -116,7 +97,7 @@ TEST(test_load, PortAHandlerDisabledHigh)
MockADC_PushValue(HIGHTHRESH);
setup_adc_expectations(adc_pin);
expect_porta_disabled(load_pin, true);
expect_porta_disabled(load_pin);
Load_HandleLoadPortA(adc_pin, load_pin);
}
@ -126,53 +107,41 @@ TEST(test_load, PortAHandlerDisabledLow)
MockADC_PushValue(LOWTHRESH);
setup_adc_expectations(adc_pin);
expect_porta_disabled(load_pin, false);
expect_porta_disabled(load_pin);
Load_HandleLoadPortA(adc_pin, load_pin);
}
TEST(test_load, PortAHandlerEnabledRisingEdgeLO)
TEST(test_load, PortAHandlerEnabledBelowTarget)
{
//Start from the rising edge.
MockADC_PushValue(HYSTERESIS_LO - 1);
MockADC_PushValue(HYSTERESIS - 1);
setup_adc_expectations(adc_pin);
expect_porta_enabled(load_pin, false);
Load_HandleLoadPortA(adc_pin, load_pin);
}
TEST(test_load, PortAHandlerEnabledRisingEdgeHI)
{
//Start from the rising edge above lo.
MockADC_PushValue(HYSTERESIS_HI - 1);
setup_adc_expectations(adc_pin);
expect_porta_enabled(load_pin, true);
expect_porta_enabled(load_pin);
Load_HandleLoadPortA(adc_pin, load_pin);
}
TEST(test_load, PortAHandlerDisabledAboveTarget)
{
MockADC_PushValue(HYSTERESIS_HI + 1);
MockADC_PushValue(HYSTERESIS);
setup_adc_expectations(adc_pin);
expect_porta_disabled(load_pin, true);
expect_porta_disabled(load_pin);
Load_HandleLoadPortA(adc_pin, load_pin);
}
TEST(test_load, PortAHandlerDisablesUntilPoweReset)
{
MockADC_PushValue(HYSTERESIS_HI - 1);
MockADC_PushValue(HYSTERESIS - 1);
MockADC_PushValue(HIGHTHRESH);
setup_adc_expectations(adc_pin);
expect_porta_disabled(load_pin, true);
expect_porta_disabled(load_pin);
setup_adc_expectations(adc_pin);
expect_porta_disabled(load_pin, false);
expect_porta_disabled(load_pin);
Load_HandleLoadPortA(adc_pin, load_pin);
Load_HandleLoadPortA(adc_pin, load_pin);
@ -184,7 +153,7 @@ TEST(test_load, PortBHandlerDisabledHigh)
MockADC_PushValue(HIGHTHRESH);
setup_adc_expectations(adc_pin);
expect_portb_disabled(load_pin, true);
expect_portb_disabled(load_pin);
Load_HandleLoadPortB(adc_pin, load_pin);
}
@ -194,66 +163,43 @@ TEST(test_load, PortBHandlerDisabledLow)
MockADC_PushValue(LOWTHRESH);
setup_adc_expectations(adc_pin);
expect_portb_disabled(load_pin, false);
expect_portb_disabled(load_pin);
Load_HandleLoadPortB(adc_pin, load_pin);
}
TEST(test_load, PortBHandlerEnabledRisingEdgeLO)
TEST(test_load, PortBHandlerEnabledBelowTarget)
{
//Start from the rising edge.
MockADC_PushValue(HYSTERESIS_LO - 1);
MockADC_PushValue(HYSTERESIS - 1);
setup_adc_expectations(adc_pin);
expect_portb_enabled(load_pin, false);
expect_portb_enabled(load_pin);
Load_HandleLoadPortB(adc_pin, load_pin);
}
TEST(test_load, PortBHandlerEnabledRisingEdgeHI)
TEST(test_load, PortBHandlerDisabledAboveTarget)
{
//Start from the rising edge.
MockADC_PushValue(HYSTERESIS_HI - 1);
MockADC_PushValue(HYSTERESIS);
setup_adc_expectations(adc_pin);
expect_portb_enabled(load_pin, true);
Load_HandleLoadPortB(adc_pin, load_pin);
}
TEST(test_load, PortBHandlerDisableFallingEdgeLO)
{
//Start from the falling edge.
MockADC_PushValue(HYSTERESIS_LO + 1);
setup_adc_expectations(adc_pin);
expect_portb_disabled(load_pin, false);
Load_HandleLoadPortB(adc_pin, load_pin);
}
TEST(test_load, PortBHandlerDisableFallingEdgeHI)
{
//Start from the falling edge.
MockADC_PushValue(HYSTERESIS_HI + 1);
setup_adc_expectations(adc_pin);
expect_portb_disabled(load_pin, false);
expect_portb_disabled(load_pin);
Load_HandleLoadPortB(adc_pin, load_pin);
}
TEST(test_load, PortBHandlerDisablesUntilPoweReset)
{
MockADC_PushValue(HYSTERESIS_HI - 1);
MockADC_PushValue(HYSTERESIS - 1);
MockADC_PushValue(HIGHTHRESH);
setup_adc_expectations(adc_pin);
expect_portb_disabled(load_pin, true);
expect_portb_disabled(load_pin);
setup_adc_expectations(adc_pin);
expect_portb_disabled(load_pin, false);
expect_portb_disabled(load_pin);
Load_HandleLoadPortB(adc_pin, load_pin);
Load_HandleLoadPortB(adc_pin, load_pin);