removed uneeded files.

This commit is contained in:
Jake Goodwin 2025-03-08 17:09:58 -08:00
parent 1f17f8dcdf
commit 32a3dcad12
25 changed files with 6911 additions and 20039 deletions

View file

@ -1,7 +0,0 @@
add_library(attic STATIC
temp_transition_helper.c
)
target_include_directories(attic PUBLIC
${CMAKE_CURRENT_LIST_DIR}
)

File diff suppressed because it is too large Load diff

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@ -1,226 +0,0 @@
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
const char * yes[] = { "SENTINEL_WILL_BE_REPLACED_BY_CMDLINE" }; // "CH32X03x", etc. element 0 is filled in by command-line
const char * no[] = { "CH32V10x", "CH32V30x", "CH32V20x", "CH32X03x", "CH32V003" };
char * WhitePull( const char ** sti )
{
const char * st = *sti;
int len = 0;
while( ( *st == ' ' || *st == '\t' || *st == '(' ) && *st ) { st++; }
const char * sts = st;
while( *st != ' ' && *st != '\t' && *st != '\n' && *st != ')' && *st != '(' && *st != 0 ) { st++; len++; }
if( *st == ')' ) { st++; }
char * ret = malloc( len + 1 );
memcpy( ret, sts, len );
ret[len] = 0;
*sti = st;
return ret;
}
int NYI( const char * s )
{
int ret = 2;
char * wp = WhitePull( &s );
int i;
for( i = 0; i < sizeof(yes)/sizeof(yes[0]); i++ )
if( strcmp( yes[i], wp ) == 0 ) ret = 1;
if( ret != 1 )
for( i = 0; i < sizeof(no)/sizeof(no[0]); i++ )
if( strcmp( no[i], wp ) == 0 ) ret = 0;
free( wp );
return ret;
}
int EvalSpec( const char * spl )
{
int rsofar = 0;
int i;
int lastv = 0;
int lasto = -1;
int ret = 0;
cont:
char * wp = WhitePull( &spl );
int def = -1;
if( strcmp( wp, "defined" ) == 0 ) def = 1;
if( strcmp( wp, "!defined" ) == 0 ) def = 2;
if( def < 0 ) return 2;
char * wpn = WhitePull( &spl );
i = NYI( wpn );
//printf( "SPIN: %s/%s/%d/%d/%d\n", wp, wpn, i, def, lasto );
if( i == 2 ) return 2;
if( def == 2 ) i = !i;
if( lasto == 1 )
{
ret = lastv || i;
}
else if( lasto == 2 )
ret = lastv && i;
else
ret = i;
char * wpa = WhitePull( &spl );
//printf( "WPA: \"%s\"\n", wpa );
lastv = ret;
lasto = -1;
//printf( "RET: %d\n", ret );
if( strcmp( wpa, "||" ) == 0 ) { lasto = 1; goto cont; }
else if( strcmp( wpa, "&&" ) == 0 ) { lasto = 2; goto cont; }
else return ret;
}
// 0 for no
// 1 for yes
// 2 for indeterminate
int NoYesInd( const char * preprocc )
{
int ret;
int ofs = 0;
if( strncmp( preprocc, "#if ", 4 ) == 0 ) ofs = 4;
if( strncmp( preprocc, "#elif ", 6 ) == 0 ) ofs = 6;
if( ofs )
{
ret = EvalSpec( preprocc + ofs );
//printf( "SPEC: %d\n", ret );
}
else if( strncmp( preprocc, "#ifdef ", 7 ) == 0 )
{
const char * ep = preprocc + 6;
char * wp = WhitePull( &ep );
ret = NYI( wp );
free( wp );
}
else if( strncmp( preprocc, "#ifndef ", 8 ) == 0 )
{
const char * ep = preprocc + 6;
char * wp = WhitePull( &ep );
ret = NYI( wp );
if( ret < 2 ) ret = !ret;
free( wp );
}
else
ret = 2;
//printf( "%d-> %s\n", ret, preprocc );
return ret;
}
const char * sslineis( const char * line, const char * match )
{
while( *line == ' ' || *line == '\t' ) line++;
const char * linestart = line;
while( *line && *match == *line ) { line++; match++; }
if( *match == 0 )
return linestart;
else
return 0;
}
int main( int argc, char ** argv )
{
if( argc != 3 )
{
fprintf( stderr, "Syntax: transition [#define to trigger on] [file to convert]\nNo'd architectures:\n" );
int i;
for( i = 0; i < sizeof(no)/sizeof(no[0]); i++ )
{
fprintf( stderr, "\t%s\n", no[i] );
}
return -1;
}
yes[0] = argv[1];
FILE * f = fopen( argv[2], "r" );
if( !f )
{
fprintf( stderr, "Error: Could not open \"%s\"\n", argv[2] );
return -2;
}
char line[1024];
char * l;
int depth = 0;
// 0 = no
// 1 = yes
// 2 = indeterminate
// 3 = super no. (I.e. after a true #if clause)
int yesnoind[1024];
yesnoind[0] = 1;
while( l = fgets( line, sizeof(line)-1, f ) )
{
const char * ss = 0;
int nyi = yesnoind[depth];
int waspre = 0;
if( (ss = sslineis( line, "#if " ) ) || (ss = sslineis( line, "#ifdef " ) ) || (ss = sslineis( line, "#ifndef " ) ) )
{
waspre = 1;
//printf( "CHECK: %d/%s\n", depth, l );
nyi = NoYesInd( ss );
depth++;
yesnoind[depth] = nyi;
}
else if( (ss = sslineis( line, "#elif " ) ) )
{
if( nyi != 2 )
{
waspre = 1;
if( nyi == 1 )
{
nyi = 3;
}
else
{
nyi = NoYesInd( ss );
}
//printf( "ELIF check: %s %d\n", ss, nyi );
yesnoind[depth] = nyi;
}
}
else if( (ss = sslineis( line, "#else" ) ) )
{
if( nyi != 2 )
{
waspre = 1;
if( yesnoind[depth] == 1 )
nyi = 3;
else
nyi = !yesnoind[depth];
yesnoind[depth] = nyi;
}
}
else if( (ss = sslineis( line, "#endif" ) ) )
{
waspre = 1;
depth--;
if( depth < 0 )
{
fprintf( stderr, "UNTERMD IF\n" );
}
}
int thisv = nyi;
int i;
for( i = 0; i <= depth; i++ )
{
//printf( "%d", yesnoind[i] );
if( yesnoind[i] == 0 || yesnoind[i] == 3 ) thisv = 0;
}
//printf( ">>%s", l );
if( thisv != 0 && thisv != 3 && ( thisv != 1 || !waspre ) )
{
printf( "%s", l );
}
}
}

View file

@ -0,0 +1,5 @@
{
"DisableFormat": true,
"SortIncludes": "Never"
}

View file

@ -7,10 +7,8 @@
#define CH32V003_GPIO_BR_H #define CH32V003_GPIO_BR_H
// includes // includes
#include <stdint.h> //uintN_t support
#include "../ch32fun/ch32fun.h" #include "../ch32fun/ch32fun.h"
#include <stdint.h> //uintN_t support
/*######## library description /*######## library description
This is a speedy and light GPIO library due to This is a speedy and light GPIO library due to
@ -19,8 +17,6 @@ This is a speedy and light GPIO library due to
branchless where it counts branchless where it counts
*/ */
/*######## library usage and configuration /*######## library usage and configuration
first, enable the desired port. first, enable the desired port.
@ -98,19 +94,19 @@ Writing `TIMx->SWEVGR |= TIM_UG` will immediately update the shadow register and
*/ */
// ######## ports, pins and states: use these for the functions below! // ######## ports, pins and states: use these for the functions below!
#define GPIOv_from_PORT_PIN(GPIO_port_n, pin) #define GPIOv_from_PORT_PIN(GPIO_port_n, pin)
enum GPIO_port_n { enum GPIO_port_n
{
GPIO_port_A = 0b00, GPIO_port_A = 0b00,
GPIO_port_C = 0b10, GPIO_port_C = 0b10,
GPIO_port_D = 0b11, GPIO_port_D = 0b11,
}; };
enum GPIO_pinModes { enum GPIO_pinModes
{
GPIO_pinMode_I_floating, GPIO_pinMode_I_floating,
GPIO_pinMode_I_pullUp, GPIO_pinMode_I_pullUp,
GPIO_pinMode_I_pullDown, GPIO_pinMode_I_pullDown,
@ -121,13 +117,15 @@ enum GPIO_pinModes {
GPIO_pinMode_O_openDrainMux, GPIO_pinMode_O_openDrainMux,
}; };
enum lowhigh { enum lowhigh
{
low, low,
high, high,
}; };
// analog inputs // analog inputs
enum GPIO_analog_inputs { enum GPIO_analog_inputs
{
GPIO_Ain0_A2, GPIO_Ain0_A2,
GPIO_Ain1_A1, GPIO_Ain1_A1,
GPIO_Ain2_C4, GPIO_Ain2_C4,
@ -141,7 +139,8 @@ enum GPIO_analog_inputs {
}; };
// how many cycles the ADC shall sample the input for (speed vs precision) // how many cycles the ADC shall sample the input for (speed vs precision)
enum GPIO_ADC_sampletimes { enum GPIO_ADC_sampletimes
{
GPIO_ADC_sampletime_3cy, GPIO_ADC_sampletime_3cy,
GPIO_ADC_sampletime_9cy, GPIO_ADC_sampletime_9cy,
GPIO_ADC_sampletime_15cy, GPIO_ADC_sampletime_15cy,
@ -152,22 +151,22 @@ enum GPIO_ADC_sampletimes {
GPIO_ADC_sampletime_241cy_default, GPIO_ADC_sampletime_241cy_default,
}; };
enum GPIO_tim1_output_sets { enum GPIO_tim1_output_sets
{
GPIO_tim1_output_set_0__D2_A1_C3_C4__D0_A2_D1, GPIO_tim1_output_set_0__D2_A1_C3_C4__D0_A2_D1,
GPIO_tim1_output_set_1__C6_C7_C0_D3__C3_C4_D1, GPIO_tim1_output_set_1__C6_C7_C0_D3__C3_C4_D1,
GPIO_tim1_output_set_2__D2_A1_C3_C4__D0_A2_D1, GPIO_tim1_output_set_2__D2_A1_C3_C4__D0_A2_D1,
GPIO_tim1_output_set_3__C4_C7_C5_D4__C3_D2_C6, GPIO_tim1_output_set_3__C4_C7_C5_D4__C3_D2_C6,
}; };
enum GPIO_tim2_output_sets { enum GPIO_tim2_output_sets
{
GPIO_tim2_output_set_0__D4_D3_C0_D7, GPIO_tim2_output_set_0__D4_D3_C0_D7,
GPIO_tim2_output_set_1__C5_C2_D2_C1, GPIO_tim2_output_set_1__C5_C2_D2_C1,
GPIO_tim2_output_set_2__C1_D3_C0_D7, GPIO_tim2_output_set_2__C1_D3_C0_D7,
GPIO_tim2_output_set_3__C1_C7_D6_D5, GPIO_tim2_output_set_3__C1_C7_D6_D5,
}; };
// ######## interface function overview: use these! // ######## interface function overview: use these!
// most functions have been reduced to function-like macros, actual definitions downstairs // most functions have been reduced to function-like macros, actual definitions downstairs
@ -202,16 +201,10 @@ static inline void GPIO_tim2_init();
#define GPIO_tim1_analogWrite(channel, value) #define GPIO_tim1_analogWrite(channel, value)
#define GPIO_tim2_analogWrite(channel, value) #define GPIO_tim2_analogWrite(channel, value)
// ######## internal function declarations // ######## internal function declarations
// ######## internal variables // ######## internal variables
// ######## preprocessor macros // ######## preprocessor macros
#define CONCAT(a, b) a##b #define CONCAT(a, b) a##b
@ -292,11 +285,8 @@ static inline void GPIO_tim2_init();
// ######## define requirements / maintenance defines // ######## define requirements / maintenance defines
// ######## small function definitions, static inline // ######## small function definitions, static inline
#undef GPIO_port_enable #undef GPIO_port_enable
#define GPIO_port_enable(GPIO_port_n) RCC->APB2PCENR |= GPIO_port_n_to_RCC_APB2Periph(GPIO_port_n); #define GPIO_port_enable(GPIO_port_n) RCC->APB2PCENR |= GPIO_port_n_to_RCC_APB2Periph(GPIO_port_n);
@ -354,24 +344,10 @@ static inline void GPIO_tim2_init();
#define GPIO_ADC_set_sampletimes_all(GPIO_ADC_sampletime) ({ \ #define GPIO_ADC_set_sampletimes_all(GPIO_ADC_sampletime) ({ \
ADC1->SAMPTR2 &= 0; \ ADC1->SAMPTR2 &= 0; \
ADC1->SAMPTR2 |= \ ADC1->SAMPTR2 |= \
GPIO_ADC_sampletime << (0 * 3) \ GPIO_ADC_sampletime << (0 * 3) | GPIO_ADC_sampletime << (1 * 3) | GPIO_ADC_sampletime << (2 * 3) | GPIO_ADC_sampletime << (3 * 3) | GPIO_ADC_sampletime << (4 * 3) | GPIO_ADC_sampletime << (5 * 3) | GPIO_ADC_sampletime << (6 * 3) | GPIO_ADC_sampletime << (7 * 3) | GPIO_ADC_sampletime << (8 * 3) | GPIO_ADC_sampletime << (9 * 3); \
| GPIO_ADC_sampletime << (1 * 3) \
| GPIO_ADC_sampletime << (2 * 3) \
| GPIO_ADC_sampletime << (3 * 3) \
| GPIO_ADC_sampletime << (4 * 3) \
| GPIO_ADC_sampletime << (5 * 3) \
| GPIO_ADC_sampletime << (6 * 3) \
| GPIO_ADC_sampletime << (7 * 3) \
| GPIO_ADC_sampletime << (8 * 3) \
| GPIO_ADC_sampletime << (9 * 3); \
ADC1->SAMPTR1 &= 0; \ ADC1->SAMPTR1 &= 0; \
ADC1->SAMPTR1 |= \ ADC1->SAMPTR1 |= \
GPIO_ADC_sampletime << (0 * 3) \ GPIO_ADC_sampletime << (0 * 3) | GPIO_ADC_sampletime << (1 * 3) | GPIO_ADC_sampletime << (2 * 3) | GPIO_ADC_sampletime << (3 * 3) | GPIO_ADC_sampletime << (4 * 3) | GPIO_ADC_sampletime << (5 * 3); \
| GPIO_ADC_sampletime << (1 * 3) \
| GPIO_ADC_sampletime << (2 * 3) \
| GPIO_ADC_sampletime << (3 * 3) \
| GPIO_ADC_sampletime << (4 * 3) \
| GPIO_ADC_sampletime << (5 * 3); \
}) })
#undef GPIO_ADC_set_power #undef GPIO_ADC_set_power
@ -383,13 +359,16 @@ static inline void GPIO_tim2_init();
#undef GPIO_ADC_calibrate #undef GPIO_ADC_calibrate
#define GPIO_ADC_calibrate() ({ \ #define GPIO_ADC_calibrate() ({ \
ADC1->CTLR2 |= ADC_RSTCAL; \ ADC1->CTLR2 |= ADC_RSTCAL; \
while(ADC1->CTLR2 & ADC_RSTCAL); \ while (ADC1->CTLR2 & ADC_RSTCAL) \
; \
ADC1->CTLR2 |= ADC_CAL; \ ADC1->CTLR2 |= ADC_CAL; \
while(ADC1->CTLR2 & ADC_CAL); \ while (ADC1->CTLR2 & ADC_CAL) \
; \
}) })
// large but will likely only ever be called once // large but will likely only ever be called once
static inline void GPIO_ADCinit() { static inline void GPIO_ADCinit()
{
// select ADC clock source // select ADC clock source
// ADCCLK = 24 MHz => RCC_ADCPRE = 0: divide by 2 // ADCCLK = 24 MHz => RCC_ADCPRE = 0: divide by 2
RCC->CFGR0 &= ~(0x1F << 11); RCC->CFGR0 &= ~(0x1F << 11);
@ -417,7 +396,8 @@ static inline void GPIO_ADCinit() {
GPIO_ADC_calibrate(); GPIO_ADC_calibrate();
} }
static inline uint16_t GPIO_analogRead(enum GPIO_analog_inputs input) { static inline uint16_t GPIO_analogRead(enum GPIO_analog_inputs input)
{
// set mux to selected input // set mux to selected input
ADC1->RSQR3 = input; ADC1->RSQR3 = input;
// allow everything to precharge // allow everything to precharge
@ -430,8 +410,6 @@ static inline uint16_t GPIO_analogRead(enum GPIO_analog_inputs input) {
return ADC1->RDATAR; return ADC1->RDATAR;
} }
#undef GPIO_tim1_map #undef GPIO_tim1_map
#define GPIO_tim1_map(GPIO_tim1_output_set) ({ \ #define GPIO_tim1_map(GPIO_tim1_output_set) ({ \
RCC->APB2PCENR |= RCC_APB2Periph_AFIO; \ RCC->APB2PCENR |= RCC_APB2Periph_AFIO; \
@ -444,7 +422,8 @@ static inline uint16_t GPIO_analogRead(enum GPIO_analog_inputs input) {
AFIO->PCFR1 |= ((GPIO_tim2_output_set & 0b11) << 8); \ AFIO->PCFR1 |= ((GPIO_tim2_output_set & 0b11) << 8); \
}) })
static inline void GPIO_tim1_init() { static inline void GPIO_tim1_init()
{
// enable TIM1 // enable TIM1
RCC->APB2PCENR |= RCC_APB2Periph_TIM1; RCC->APB2PCENR |= RCC_APB2Periph_TIM1;
// reset TIM1 to init all regs // reset TIM1 to init all regs
@ -465,7 +444,8 @@ static inline void GPIO_tim1_init() {
// Enable TIM1 // Enable TIM1
TIM1->CTLR1 |= TIM_CEN; TIM1->CTLR1 |= TIM_CEN;
} }
static inline void GPIO_tim2_init() { static inline void GPIO_tim2_init()
{
// enable TIM2 // enable TIM2
RCC->APB1PCENR |= RCC_APB1Periph_TIM2; RCC->APB1PCENR |= RCC_APB1Periph_TIM2;
// reset TIM2 to init all regs // reset TIM2 to init all regs

View file

@ -5,8 +5,8 @@
#define CH32V003_SPI_H #define CH32V003_SPI_H
// includes // includes
#include<stdint.h> //uintN_t support
#include "ch32fun.h" #include "ch32fun.h"
#include <stdint.h> //uintN_t support
#ifndef APB_CLOCK #ifndef APB_CLOCK
#define APB_CLOCK FUNCONF_SYSTEM_CORE_CLOCK #define APB_CLOCK FUNCONF_SYSTEM_CORE_CLOCK
@ -47,8 +47,6 @@ then pick the desired setting of each group:
#define CH32V003_SPI_NSS_SOFTWARE_ANY_MANUAL // toggle manually! #define CH32V003_SPI_NSS_SOFTWARE_ANY_MANUAL // toggle manually!
*/ */
// ######## function overview (declarations): use these! // ######## function overview (declarations): use these!
// initialize and configure the SPI peripheral // initialize and configure the SPI peripheral
static inline void SPI_init(); static inline void SPI_init();
@ -87,20 +85,14 @@ static inline void SPI_poweron();
static inline void kill_interrrupts(); static inline void kill_interrrupts();
static inline void restore_interrupts(); static inline void restore_interrupts();
// ######## internal function declarations // ######## internal function declarations
static inline void SPI_wait_TX_complete(); static inline void SPI_wait_TX_complete();
static inline uint8_t SPI_is_RX_empty(); static inline uint8_t SPI_is_RX_empty();
static inline void SPI_wait_RX_available(); static inline void SPI_wait_RX_available();
// ######## internal variables // ######## internal variables
static uint16_t EXT1_INTENR_backup; static uint16_t EXT1_INTENR_backup;
// ######## preprocessor macros // ######## preprocessor macros
// min and max helper macros // min and max helper macros
#define MIN(a, b) (((a) < (b)) ? (a) : (b)) #define MIN(a, b) (((a) < (b)) ? (a) : (b))
@ -122,8 +114,6 @@ static uint16_t EXT1_INTENR_backup;
_Static_assert(SPI_CLK_PRESCALER >= 0 && SPI_CLK_PRESCALER <= 7, "SPI_CLK_PRESCALER is out of range (0..7). Please set a different SPI bus speed. prescaler = log2(f_CPU/f_SPI)"); _Static_assert(SPI_CLK_PRESCALER >= 0 && SPI_CLK_PRESCALER <= 7, "SPI_CLK_PRESCALER is out of range (0..7). Please set a different SPI bus speed. prescaler = log2(f_CPU/f_SPI)");
// #pragma message(VAR_NAME_VALUE(SPI_CLK_PRESCALER)) // #pragma message(VAR_NAME_VALUE(SPI_CLK_PRESCALER))
// ######## preprocessor #define requirements // ######## preprocessor #define requirements
#if !defined(CH32V003_SPI_DIRECTION_2LINE_TXRX) && !defined(CH32V003_SPI_DIRECTION_1LINE_TX) #if !defined(CH32V003_SPI_DIRECTION_2LINE_TXRX) && !defined(CH32V003_SPI_DIRECTION_1LINE_TX)
@ -161,10 +151,9 @@ _Static_assert(SPI_CLK_PRESCALER >= 0 && SPI_CLK_PRESCALER <= 7, "SPI_CLK_PRESCA
#warning "none of the CH32V003_SPI_NSS_ options were defined!" #warning "none of the CH32V003_SPI_NSS_ options were defined!"
#endif #endif
// ######## small function definitions, static inline // ######## small function definitions, static inline
static inline void SPI_init() { static inline void SPI_init()
{
SPI_poweron(); SPI_poweron();
// reset control register // reset control register
@ -237,47 +226,59 @@ static inline void SPI_init() {
#endif #endif
} }
static inline void SPI_begin_8() { static inline void SPI_begin_8()
{
SPI1->CTLR1 &= ~(SPI_CTLR1_DFF); // DFF 16bit data-length enable, writable only when SPE is 0 SPI1->CTLR1 &= ~(SPI_CTLR1_DFF); // DFF 16bit data-length enable, writable only when SPE is 0
SPI1->CTLR1 |= SPI_CTLR1_SPE; SPI1->CTLR1 |= SPI_CTLR1_SPE;
} }
static inline void SPI_begin_16() { static inline void SPI_begin_16()
{
SPI1->CTLR1 |= SPI_CTLR1_DFF; // DFF 16bit data-length enable, writable only when SPE is 0 SPI1->CTLR1 |= SPI_CTLR1_DFF; // DFF 16bit data-length enable, writable only when SPE is 0
SPI1->CTLR1 |= SPI_CTLR1_SPE; SPI1->CTLR1 |= SPI_CTLR1_SPE;
} }
static inline void SPI_end() { static inline void SPI_end()
{
SPI1->CTLR1 &= ~(SPI_CTLR1_SPE); SPI1->CTLR1 &= ~(SPI_CTLR1_SPE);
} }
#if defined(CH32V003_SPI_NSS_SOFTWARE_PC3) #if defined(CH32V003_SPI_NSS_SOFTWARE_PC3)
static inline void SPI_NSS_software_high() { static inline void SPI_NSS_software_high()
{
GPIOC->BSHR = (1 << 3); GPIOC->BSHR = (1 << 3);
} }
static inline void SPI_NSS_software_low() { static inline void SPI_NSS_software_low()
{
GPIOC->BSHR = (1 << (16 + 3)); GPIOC->BSHR = (1 << (16 + 3));
} }
#elif defined(CH32V003_SPI_NSS_SOFTWARE_PC4) #elif defined(CH32V003_SPI_NSS_SOFTWARE_PC4)
static inline void SPI_NSS_software_high() { static inline void SPI_NSS_software_high()
{
GPIOC->BSHR = (1 << 4); GPIOC->BSHR = (1 << 4);
} }
static inline void SPI_NSS_software_low() { static inline void SPI_NSS_software_low()
{
GPIOC->BSHR = (1 << (16 + 4)); GPIOC->BSHR = (1 << (16 + 4));
} }
#endif #endif
static inline uint8_t SPI_read_8() { static inline uint8_t SPI_read_8()
{
return SPI1->DATAR; return SPI1->DATAR;
} }
static inline uint16_t SPI_read_16() { static inline uint16_t SPI_read_16()
{
return SPI1->DATAR; return SPI1->DATAR;
} }
static inline void SPI_write_8(uint8_t data) { static inline void SPI_write_8(uint8_t data)
{
SPI1->DATAR = data; SPI1->DATAR = data;
} }
static inline void SPI_write_16(uint16_t data) { static inline void SPI_write_16(uint16_t data)
{
SPI1->DATAR = data; SPI1->DATAR = data;
} }
static inline uint8_t SPI_transfer_8(uint8_t data) { static inline uint8_t SPI_transfer_8(uint8_t data)
{
#if defined(CH32V003_SPI_NSS_SOFTWARE_PC3) || defined(CH32V003_SPI_NSS_SOFTWARE_PC4) #if defined(CH32V003_SPI_NSS_SOFTWARE_PC3) || defined(CH32V003_SPI_NSS_SOFTWARE_PC4)
SPI_NSS_software_high(); SPI_NSS_software_high();
#endif #endif
@ -290,7 +291,8 @@ static inline uint8_t SPI_transfer_8(uint8_t data) {
#endif #endif
return SPI_read_8(); return SPI_read_8();
} }
static inline uint16_t SPI_transfer_16(uint16_t data) { static inline uint16_t SPI_transfer_16(uint16_t data)
{
#if defined(CH32V003_SPI_NSS_SOFTWARE_PC3) || defined(CH32V003_SPI_NSS_SOFTWARE_PC4) #if defined(CH32V003_SPI_NSS_SOFTWARE_PC3) || defined(CH32V003_SPI_NSS_SOFTWARE_PC4)
SPI_NSS_software_high(); SPI_NSS_software_high();
#endif #endif
@ -304,44 +306,50 @@ static inline uint16_t SPI_transfer_16(uint16_t data) {
return SPI_read_16(); return SPI_read_16();
} }
static inline void SPI_poweroff() { static inline void SPI_poweroff()
{
SPI_end(); SPI_end();
RCC->APB2PCENR &= ~RCC_APB2Periph_SPI1; RCC->APB2PCENR &= ~RCC_APB2Periph_SPI1;
} }
static inline void SPI_poweron() { static inline void SPI_poweron()
{
RCC->APB2PCENR |= RCC_APB2Periph_GPIOC | RCC_APB2Periph_SPI1; RCC->APB2PCENR |= RCC_APB2Periph_GPIOC | RCC_APB2Periph_SPI1;
} }
static inline void kill_interrrupts() { static inline void kill_interrrupts()
{
EXT1_INTENR_backup = EXTI->INTENR; EXT1_INTENR_backup = EXTI->INTENR;
// zero the interrupt enable register to disable all interrupts // zero the interrupt enable register to disable all interrupts
EXTI->INTENR = 0; EXTI->INTENR = 0;
} }
static inline void restore_interrupts() { static inline void restore_interrupts()
{
EXTI->INTENR = EXT1_INTENR_backup; EXTI->INTENR = EXT1_INTENR_backup;
} }
// ######## small internal function definitions, static inline // ######## small internal function definitions, static inline
static inline void SPI_wait_TX_complete() { static inline void SPI_wait_TX_complete()
{
while (!(SPI1->STATR & SPI_STATR_TXE)) {} while (!(SPI1->STATR & SPI_STATR_TXE)) {}
} }
static inline uint8_t SPI_is_RX_empty() { static inline uint8_t SPI_is_RX_empty()
{
return SPI1->STATR & SPI_STATR_RXNE; return SPI1->STATR & SPI_STATR_RXNE;
} }
static inline void SPI_wait_RX_available() { static inline void SPI_wait_RX_available()
{
while (!(SPI1->STATR & SPI_STATR_RXNE)) {} while (!(SPI1->STATR & SPI_STATR_RXNE)) {}
} }
static inline void SPI_wait_not_busy() { static inline void SPI_wait_not_busy()
{
while ((SPI1->STATR & SPI_STATR_BSY) != 0) {} while ((SPI1->STATR & SPI_STATR_BSY) != 0) {}
} }
static inline void SPI_wait_transmit_finished() { static inline void SPI_wait_transmit_finished()
{
SPI_wait_TX_complete(); SPI_wait_TX_complete();
SPI_wait_not_busy(); SPI_wait_not_busy();
} }
// ######## implementation block // ######## implementation block
// #define CH32V003_SPI_IMPLEMENTATION //enable so LSP can give you text colors while working on the implementation block, disable for normal use of the library // #define CH32V003_SPI_IMPLEMENTATION //enable so LSP can give you text colors while working on the implementation block, disable for normal use of the library
#if defined(CH32V003_SPI_IMPLEMENTATION) #if defined(CH32V003_SPI_IMPLEMENTATION)

View file

@ -21,8 +21,6 @@
sum[7] += ReadTouchPin( GPIOD, 4, 7, iterations ); sum[7] += ReadTouchPin( GPIOD, 4, 7, iterations );
*/ */
#define TOUCH_ADC_SAMPLE_TIME 2 // Tricky: Don't change this without a lot of experimentation. #define TOUCH_ADC_SAMPLE_TIME 2 // Tricky: Don't change this without a lot of experimentation.
// Can either be 0 or 1. // Can either be 0 or 1.
@ -50,10 +48,7 @@
jalr a2, 1\n\ jalr a2, 1\n\
.long 0x00010001\n\ .long 0x00010001\n\
.long 0x00010001\n\ .long 0x00010001\n\
"\ " ::[cyccnt] "r"(SysTick->CNT) : "a1", "a2");
:: [cyccnt]"r"(SysTick->CNT) : "a1", "a2"\
);
static void InitTouchADC(); static void InitTouchADC();
void InitTouchADC() void InitTouchADC()
@ -70,11 +65,13 @@ void InitTouchADC( )
// Reset calibration // Reset calibration
ADC1->CTLR2 |= ADC_RSTCAL; ADC1->CTLR2 |= ADC_RSTCAL;
while(ADC1->CTLR2 & ADC_RSTCAL); while (ADC1->CTLR2 & ADC_RSTCAL)
;
// Calibrate // Calibrate
ADC1->CTLR2 |= ADC_CAL; ADC1->CTLR2 |= ADC_CAL;
while(ADC1->CTLR2 & ADC_CAL); while (ADC1->CTLR2 & ADC_CAL)
;
} }
// Run from RAM to get even more stable timing. // Run from RAM to get even more stable timing.
@ -97,11 +94,14 @@ uint32_t ReadTouchPin( GPIO_TypeDef * io, int portpin, int adcno, int iterations
// If we run multiple times with slightly different wait times, we can // If we run multiple times with slightly different wait times, we can
// reduce the impact of the ADC's DNL. // reduce the impact of the ADC's DNL.
#if TOUCH_FLAT == 1 #if TOUCH_FLAT == 1
#define RELEASEIO io->BSHR = 1<<(portpin+16*TOUCH_SLOPE); io->CFGLR = CFGFLOAT; #define RELEASEIO \
io->BSHR = 1 << (portpin + 16 * TOUCH_SLOPE); \
io->CFGLR = CFGFLOAT;
#else #else
#define RELEASEIO io->CFGLR = CFGFLOAT; io->BSHR = 1<<(portpin+16*TOUCH_SLOPE); #define RELEASEIO \
io->CFGLR = CFGFLOAT; \
io->BSHR = 1 << (portpin + 16 * TOUCH_SLOPE);
#endif #endif
#define INNER_LOOP(n) \ #define INNER_LOOP(n) \
@ -121,7 +121,8 @@ uint32_t ReadTouchPin( GPIO_TypeDef * io, int portpin, int adcno, int iterations
/* Sampling actually starts here, somewhere, so we can let other \ /* Sampling actually starts here, somewhere, so we can let other \
interrupts run */ \ interrupts run */ \
__enable_irq(); \ __enable_irq(); \
while(!(ADC1->STATR & ADC_EOC)); \ while (!(ADC1->STATR & ADC_EOC)) \
; \
io->CFGLR = CFGDRIVE; \ io->CFGLR = CFGDRIVE; \
io->BSHR = 1 << (portpin + (16 * (1 - TOUCH_SLOPE))); \ io->BSHR = 1 << (portpin + (16 * (1 - TOUCH_SLOPE))); \
ret += ADC1->RDATAR; \ ret += ADC1->RDATAR; \
@ -173,7 +174,8 @@ uint32_t ReadTouchPinSafe( GPIO_TypeDef * io, int portpin, int adcno, int iterat
/* Sampling actually starts here, somewhere, so we can let other \ /* Sampling actually starts here, somewhere, so we can let other \
interrupts run */ \ interrupts run */ \
__enable_irq(); \ __enable_irq(); \
while(!(ADC1->STATR & ADC_EOC)); \ while (!(ADC1->STATR & ADC_EOC)) \
; \
__disable_irq(); \ __disable_irq(); \
io->CFGLR = (GPIO_CFGLR_OUT_2Mhz_PP) << (4 * portpin) | (io->CFGLR & (~(0xf << (4 * portpin)))); \ io->CFGLR = (GPIO_CFGLR_OUT_2Mhz_PP) << (4 * portpin) | (io->CFGLR & (~(0xf << (4 * portpin)))); \
__enable_irq(); \ __enable_irq(); \
@ -195,7 +197,6 @@ uint32_t ReadTouchPinSafe( GPIO_TypeDef * io, int portpin, int adcno, int iterat
return ret; return ret;
} }
#endif #endif
/* /*
@ -221,4 +222,3 @@ uint32_t ReadTouchPinSafe( GPIO_TypeDef * io, int portpin, int adcno, int iterat
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE. * SOFTWARE.
*/ */

View file

@ -64,7 +64,6 @@ uint8_t ch32v307eth_MACRxBuf[CH32V307GIGABIT_RXBUFNB*CH32V307GIGABIT_BUFFSIZE]
ETH_DMADESCTypeDef *pDMARxGet; ETH_DMADESCTypeDef *pDMARxGet;
ETH_DMADESCTypeDef *pDMATxSet; ETH_DMADESCTypeDef *pDMATxSet;
// Internal functions // Internal functions
static int ch32v307ethPHYRegWrite(uint32_t reg, uint32_t val); static int ch32v307ethPHYRegWrite(uint32_t reg, uint32_t val);
static int ch32v307ethPHYRegAsyncRead(int reg, int *value); static int ch32v307ethPHYRegAsyncRead(int reg, int *value);
@ -131,7 +130,6 @@ static int ch32v307ethTickPhy(void)
return 0; return 0;
} }
// Based on ETH_WritePHYRegister // Based on ETH_WritePHYRegister
static int ch32v307ethPHYRegWrite(uint32_t reg, uint32_t val) static int ch32v307ethPHYRegWrite(uint32_t reg, uint32_t val)
{ {
@ -142,7 +140,8 @@ static int ch32v307ethPHYRegWrite( uint32_t reg, uint32_t val )
ETH_MACMIIAR_MW | ETH_MACMIIAR_MB; ETH_MACMIIAR_MW | ETH_MACMIIAR_MB;
uint32_t timeout = 0x100000; uint32_t timeout = 0x100000;
while( ( ETH->MACMIIAR & ETH_MACMIIAR_MB ) && --timeout ); while ((ETH->MACMIIAR & ETH_MACMIIAR_MB) && --timeout)
;
// If timeout = 0, is an error. // If timeout = 0, is an error.
return timeout ? 0 : -1; return timeout ? 0 : -1;
@ -156,13 +155,13 @@ static int ch32v307ethPHYRegRead( uint32_t reg )
(0 /*!ETH_MACMIIAR_MW*/) | ETH_MACMIIAR_MB; (0 /*!ETH_MACMIIAR_MW*/) | ETH_MACMIIAR_MB;
uint32_t timeout = 0x100000; uint32_t timeout = 0x100000;
while( ( ETH->MACMIIAR & ETH_MACMIIAR_MB ) && --timeout ); while ((ETH->MACMIIAR & ETH_MACMIIAR_MB) && --timeout)
;
// If timeout = 0, is an error. // If timeout = 0, is an error.
return timeout ? ETH->MACMIIDR : -1; return timeout ? ETH->MACMIIDR : -1;
} }
static void ch32v307ethGetMacInUC(uint8_t *mac) static void ch32v307ethGetMacInUC(uint8_t *mac)
{ {
// Mac is backwards. // Mac is backwards.
@ -229,16 +228,19 @@ static int ch32v307ethInit( void )
RCC->CTLR |= RCC_PLL3ON | RCC_PLL2ON; RCC->CTLR |= RCC_PLL3ON | RCC_PLL2ON;
int timeout; int timeout;
for( timeout = 10000; timeout > 0; timeout--) if (RCC->CTLR & RCC_PLL3RDY) break; for (timeout = 10000; timeout > 0; timeout--)
if (RCC->CTLR & RCC_PLL3RDY) break;
if (timeout == 0) return -5; if (timeout == 0) return -5;
for( timeout = 10000; timeout > 0; timeout--) if (RCC->CTLR & RCC_PLL2RDY) break; for (timeout = 10000; timeout > 0; timeout--)
if (RCC->CTLR & RCC_PLL2RDY) break;
if (timeout == 0) return -6; if (timeout == 0) return -6;
// PLL = x18 (0 in register) // PLL = x18 (0 in register)
RCC->CFGR0 = (RCC->CFGR0 & ~(0xf << 18)) | 0; RCC->CFGR0 = (RCC->CFGR0 & ~(0xf << 18)) | 0;
RCC->CTLR |= RCC_PLLON; RCC->CTLR |= RCC_PLLON;
for( timeout = 10000; timeout > 0; timeout--) if (RCC->CTLR & RCC_PLLRDY) break; for (timeout = 10000; timeout > 0; timeout--)
if (RCC->CTLR & RCC_PLLRDY) break;
if (timeout == 0) return -7; if (timeout == 0) return -7;
// Switch to PLL. // Switch to PLL.
@ -543,6 +545,4 @@ static int ch32v307ethTransmitStatic(uint8_t * buffer, uint32_t length, int enab
return 0; return 0;
} }
#endif #endif

View file

@ -131,7 +131,6 @@ void USBHS_IRQHandler(void)
#endif #endif
break; break;
case HID_SET_IDLE: case HID_SET_IDLE:
if (USBHS_SetupReqIndex < HUSB_HID_INTERFACES) if (USBHS_SetupReqIndex < HUSB_HID_INTERFACES)
HSUSBCTX.USBHS_HidIdle[USBHS_SetupReqIndex] = (uint8_t)(USBHS_IndexValue >> 8); HSUSBCTX.USBHS_HidIdle[USBHS_SetupReqIndex] = (uint8_t)(USBHS_IndexValue >> 8);
@ -190,7 +189,6 @@ void USBHS_IRQHandler(void)
goto sendstall; goto sendstall;
} }
/* Copy Descriptors to Endp0 DMA buffer */ /* Copy Descriptors to Endp0 DMA buffer */
int totalLen = USBHS_SetupReqLen; int totalLen = USBHS_SetupReqLen;
if (totalLen > len) if (totalLen > len)
@ -343,7 +341,6 @@ void USBHS_IRQHandler(void)
} }
} }
{ {
/* end-point 0 data Tx/Rx */ /* end-point 0 data Tx/Rx */
if (USBHS_SetupReqType & DEF_UEP_IN) if (USBHS_SetupReqType & DEF_UEP_IN)
@ -375,8 +372,7 @@ void USBHS_IRQHandler(void)
// if one request not support, return stall. Stall means permanent error. // if one request not support, return stall. Stall means permanent error.
USBHSD->UEP0_TX_CTRL = USBHS_UEP_T_TOG_DATA1 | USBHS_UEP_T_RES_STALL; USBHSD->UEP0_TX_CTRL = USBHS_UEP_T_TOG_DATA1 | USBHS_UEP_T_RES_STALL;
USBHSD->UEP0_RX_CTRL = USBHS_UEP_R_TOG_DATA1 | USBHS_UEP_R_RES_STALL; USBHSD->UEP0_RX_CTRL = USBHS_UEP_R_TOG_DATA1 | USBHS_UEP_R_RES_STALL;
replycomplete: replycomplete:;
;
} }
if (intfgst & (CRB_UIF_TRANSFER)) if (intfgst & (CRB_UIF_TRANSFER))
{ {
@ -421,7 +417,6 @@ void USBHS_IRQHandler(void)
} }
else if ((ctx->USBHS_SetupReqType & USB_REQ_TYP_MASK) != USB_REQ_TYP_STANDARD) else if ((ctx->USBHS_SetupReqType & USB_REQ_TYP_MASK) != USB_REQ_TYP_STANDARD)
{ {
#if HUSB_HID_USER_REPORTS #if HUSB_HID_USER_REPORTS
len = ctx->USBHS_SetupReqLen >= DEF_USBD_UEP0_SIZE ? DEF_USBD_UEP0_SIZE : ctx->USBHS_SetupReqLen; len = ctx->USBHS_SetupReqLen >= DEF_USBD_UEP0_SIZE ? DEF_USBD_UEP0_SIZE : ctx->USBHS_SetupReqLen;
if (len && HSUSBCTX.USBHS_SetupReqCode == HID_GET_REPORT) if (len && HSUSBCTX.USBHS_SetupReqCode == HID_GET_REPORT)
@ -555,21 +550,16 @@ void USBHS_IRQHandler(void)
void USBHS_InternalFinishSetup() void USBHS_InternalFinishSetup()
{ {
// To reconfigure your endpoints for TX/RX do it here. // To reconfigure your endpoints for TX/RX do it here.
#if HUSB_CONFIG_EPS > 5 #if HUSB_CONFIG_EPS > 5
USBHSD->ENDP_CONFIG = USBHS_UEP0_T_EN | USBHS_UEP0_R_EN | USBHS_UEP1_T_EN USBHSD->ENDP_CONFIG = USBHS_UEP0_T_EN | USBHS_UEP0_R_EN | USBHS_UEP1_T_EN | USBHS_UEP2_T_EN | USBHS_UEP3_T_EN | USBHS_UEP4_T_EN | USBHS_UEP5_R_EN;
| USBHS_UEP2_T_EN | USBHS_UEP3_T_EN | USBHS_UEP4_T_EN | USBHS_UEP5_R_EN;
#elif HUSB_CONFIG_EPS > 4 #elif HUSB_CONFIG_EPS > 4
USBHSD->ENDP_CONFIG = USBHS_UEP0_T_EN | USBHS_UEP0_R_EN | USBHS_UEP1_T_EN USBHSD->ENDP_CONFIG = USBHS_UEP0_T_EN | USBHS_UEP0_R_EN | USBHS_UEP1_T_EN | USBHS_UEP2_T_EN | USBHS_UEP3_T_EN | USBHS_UEP4_T_EN;
| USBHS_UEP2_T_EN | USBHS_UEP3_T_EN | USBHS_UEP4_T_EN;
#elif HUSB_CONFIG_EPS > 3 #elif HUSB_CONFIG_EPS > 3
USBHSD->ENDP_CONFIG = USBHS_UEP0_T_EN | USBHS_UEP0_R_EN | USBHS_UEP1_T_EN USBHSD->ENDP_CONFIG = USBHS_UEP0_T_EN | USBHS_UEP0_R_EN | USBHS_UEP1_T_EN | USBHS_UEP2_T_EN | USBHS_UEP3_T_EN;
| USBHS_UEP2_T_EN | USBHS_UEP3_T_EN;
#elif HUSB_CONFIG_EPS > 2 #elif HUSB_CONFIG_EPS > 2
USBHSD->ENDP_CONFIG = USBHS_UEP0_T_EN | USBHS_UEP0_R_EN | USBHS_UEP1_T_EN USBHSD->ENDP_CONFIG = USBHS_UEP0_T_EN | USBHS_UEP0_R_EN | USBHS_UEP1_T_EN | USBHS_UEP2_T_EN;
| USBHS_UEP2_T_EN;
#elif HUSB_CONFIG_EPS > 1 #elif HUSB_CONFIG_EPS > 1
USBHSD->ENDP_CONFIG = USBHS_UEP0_T_EN | USBHS_UEP0_R_EN | USBHS_UEP1_T_EN; USBHSD->ENDP_CONFIG = USBHS_UEP0_T_EN | USBHS_UEP0_R_EN | USBHS_UEP1_T_EN;
#else #else
@ -659,5 +649,3 @@ int HSUSBSetup()
// Go on-bus. // Go on-bus.
return 0; return 0;
} }

View file

@ -7,10 +7,10 @@
This is referenced in Chapter 22 USB Host/Device Controller (USBHD) of CH32FV2x_V3xRM.pdf This is referenced in Chapter 22 USB Host/Device Controller (USBHD) of CH32FV2x_V3xRM.pdf
*/ */
#include <stdint.h>
#include "ch32fun.h" #include "ch32fun.h"
#include "usb_defines.h"
#include "usb_config.h" #include "usb_config.h"
#include "usb_defines.h"
#include <stdint.h>
struct _USBState struct _USBState
{ {
@ -59,7 +59,6 @@ void HandleGotEPComplete( struct _USBState * ctx, int ep );
extern struct _USBState HSUSBCTX; extern struct _USBState HSUSBCTX;
// To TX, you can use USBFS_GetEPBufferIfAvailable or USBHSD_UEP_TXBUF( endp ) // To TX, you can use USBFS_GetEPBufferIfAvailable or USBHSD_UEP_TXBUF( endp )
static inline uint8_t *USBHS_GetEPBufferIfAvailable(int endp) static inline uint8_t *USBHS_GetEPBufferIfAvailable(int endp)

View file

@ -41,7 +41,6 @@
// @brief set the random LFSR values seed by default to a known-good value // @brief set the random LFSR values seed by default to a known-good value
static uint32_t _rand_lfsr = 0x747AA32F; static uint32_t _rand_lfsr = 0x747AA32F;
/*** Library specific Functions - Do Not Use *********************************/ /*** Library specific Functions - Do Not Use *********************************/
/****************************************************************************/ /****************************************************************************/
/// @brief Updates the LFSR by getting a new tap bit, for MSB, then shifting /// @brief Updates the LFSR by getting a new tap bit, for MSB, then shifting
@ -65,7 +64,6 @@ uint8_t _rand_lfsr_update(void)
return msb >> 31; return msb >> 31;
} }
/// @brief Generates a Random 32-bit number, using the LFSR - by generating /// @brief Generates a Random 32-bit number, using the LFSR - by generating
/// a random bit from LFSR taps, 32 times. /// a random bit from LFSR taps, 32 times.
/// @param None /// @param None
@ -86,8 +84,6 @@ uint32_t _rand_gen_32b(void)
return rand_out; return rand_out;
} }
/// @brief Generates a Random n-bit number, using the LFSR - by generating /// @brief Generates a Random n-bit number, using the LFSR - by generating
/// a random bit from LFSR taps, n times. /// a random bit from LFSR taps, n times.
/// @param None /// @param None
@ -107,7 +103,6 @@ uint32_t _rand_gen_nb( int bits)
return rand_out; return rand_out;
} }
/*** API Functions ***********************************************************/ /*** API Functions ***********************************************************/
/*****************************************************************************/ /*****************************************************************************/
/// @brief seeds the Random LFSR to the value passed /// @brief seeds the Random LFSR to the value passed
@ -118,7 +113,6 @@ void seed(const uint32_t seed_val)
_rand_lfsr = seed_val; _rand_lfsr = seed_val;
} }
/// @brief Generates a Random (32-bit) Number, based on the RANDOM_STRENGTH /// @brief Generates a Random (32-bit) Number, based on the RANDOM_STRENGTH
/// you have selected /// you have selected
/// @param None /// @param None

View file

@ -6,9 +6,9 @@
#ifndef _SSD1306_H #ifndef _SSD1306_H
#define _SSD1306_H #define _SSD1306_H
#include "font_8x8.h"
#include <stdint.h> #include <stdint.h>
#include <string.h> #include <string.h>
#include "font_8x8.h"
// comfortable packet size for this OLED // comfortable packet size for this OLED
#define SSD1306_PSZ 32 #define SSD1306_PSZ 32
@ -181,10 +181,22 @@ void ssd1306_setbuf(uint8_t color)
*/ */
const uint8_t expand[16] = const uint8_t expand[16] =
{ {
0x00,0x02,0x08,0x0a, 0x00,
0x20,0x22,0x28,0x2a, 0x02,
0x80,0x82,0x88,0x8a, 0x08,
0xa0,0xa2,0xa8,0xaa, 0x0a,
0x20,
0x22,
0x28,
0x2a,
0x80,
0x82,
0x88,
0x8a,
0xa0,
0xa2,
0xa8,
0xaa,
}; };
#endif #endif
@ -252,7 +264,6 @@ void ssd1306_refresh(void)
} }
#endif #endif
#endif #endif
} }
/* /*
@ -301,16 +312,19 @@ void ssd1306_xorPixel(uint32_t x, uint32_t y)
* draw a an image from an array, directly into to the display buffer * draw a an image from an array, directly into to the display buffer
* the color modes allow for overwriting and even layering (sprites!) * the color modes allow for overwriting and even layering (sprites!)
*/ */
void ssd1306_drawImage(uint32_t x, uint32_t y, const unsigned char* input, uint32_t width, uint32_t height, uint32_t color_mode) { void ssd1306_drawImage(uint32_t x, uint32_t y, const unsigned char *input, uint32_t width, uint32_t height, uint32_t color_mode)
{
uint32_t x_absolute; uint32_t x_absolute;
uint32_t y_absolute; uint32_t y_absolute;
uint32_t pixel; uint32_t pixel;
uint32_t bytes_to_draw = width / 8; uint32_t bytes_to_draw = width / 8;
uint32_t buffer_addr; uint32_t buffer_addr;
for (uint32_t line = 0; line < height; line++) { for (uint32_t line = 0; line < height; line++)
{
y_absolute = y + line; y_absolute = y + line;
if (y_absolute >= SSD1306_H) { if (y_absolute >= SSD1306_H)
{
break; break;
} }
@ -318,12 +332,15 @@ void ssd1306_drawImage(uint32_t x, uint32_t y, const unsigned char* input, uint3
// bitmask for current pixel in vertical (output) byte // bitmask for current pixel in vertical (output) byte
uint32_t v_mask = 1 << (y_absolute & 7); uint32_t v_mask = 1 << (y_absolute & 7);
for (uint32_t byte = 0; byte < bytes_to_draw; byte++) { for (uint32_t byte = 0; byte < bytes_to_draw; byte++)
{
uint32_t input_byte = input[byte + line * bytes_to_draw]; uint32_t input_byte = input[byte + line * bytes_to_draw];
for (pixel = 0; pixel < 8; pixel++) { for (pixel = 0; pixel < 8; pixel++)
{
x_absolute = x + 8 * (bytes_to_draw - byte) + pixel; x_absolute = x + 8 * (bytes_to_draw - byte) + pixel;
if (x_absolute >= SSD1306_W) { if (x_absolute >= SSD1306_W)
{
break; break;
} }
// looking at the horizontal display, we're drawing bytes bottom to top, not left to right, hence y / 8 // looking at the horizontal display, we're drawing bytes bottom to top, not left to right, hence y / 8
@ -331,7 +348,8 @@ void ssd1306_drawImage(uint32_t x, uint32_t y, const unsigned char* input, uint3
// state of current pixel // state of current pixel
uint8_t input_pixel = input_byte & (1 << pixel); uint8_t input_pixel = input_byte & (1 << pixel);
switch (color_mode) { switch (color_mode)
{
case 0: case 0:
// write pixels as they are // write pixels as they are
ssd1306_buffer[buffer_addr] = (ssd1306_buffer[buffer_addr] & ~v_mask) | (input_pixel ? v_mask : 0); ssd1306_buffer[buffer_addr] = (ssd1306_buffer[buffer_addr] & ~v_mask) | (input_pixel ? v_mask : 0);
@ -483,19 +501,23 @@ void ssd1306_drawCircle(int x, int y, int radius, int color)
int err = 2 - 2 * radius; int err = 2 - 2 * radius;
int e2; int e2;
do { do
{
ssd1306_drawPixel(x - x_pos, y + y_pos, color); ssd1306_drawPixel(x - x_pos, y + y_pos, color);
ssd1306_drawPixel(x + x_pos, y + y_pos, color); ssd1306_drawPixel(x + x_pos, y + y_pos, color);
ssd1306_drawPixel(x + x_pos, y - y_pos, color); ssd1306_drawPixel(x + x_pos, y - y_pos, color);
ssd1306_drawPixel(x - x_pos, y - y_pos, color); ssd1306_drawPixel(x - x_pos, y - y_pos, color);
e2 = err; e2 = err;
if (e2 <= y_pos) { if (e2 <= y_pos)
{
err += ++y_pos * 2 + 1; err += ++y_pos * 2 + 1;
if(-x_pos == y_pos && e2 <= x_pos) { if (-x_pos == y_pos && e2 <= x_pos)
{
e2 = 0; e2 = 0;
} }
} }
if (e2 > x_pos) { if (e2 > x_pos)
{
err += ++x_pos * 2 + 1; err += ++x_pos * 2 + 1;
} }
} while (x_pos <= 0); } while (x_pos <= 0);
@ -512,7 +534,8 @@ void ssd1306_fillCircle(int x, int y, int radius, int color)
int err = 2 - 2 * radius; int err = 2 - 2 * radius;
int e2; int e2;
do { do
{
ssd1306_drawPixel(x - x_pos, y + y_pos, color); ssd1306_drawPixel(x - x_pos, y + y_pos, color);
ssd1306_drawPixel(x + x_pos, y + y_pos, color); ssd1306_drawPixel(x + x_pos, y + y_pos, color);
ssd1306_drawPixel(x + x_pos, y - y_pos, color); ssd1306_drawPixel(x + x_pos, y - y_pos, color);
@ -520,13 +543,16 @@ void ssd1306_fillCircle(int x, int y, int radius, int color)
ssd1306_drawFastHLine(x + x_pos, y + y_pos, 2 * (-x_pos) + 1, color); ssd1306_drawFastHLine(x + x_pos, y + y_pos, 2 * (-x_pos) + 1, color);
ssd1306_drawFastHLine(x + x_pos, y - y_pos, 2 * (-x_pos) + 1, color); ssd1306_drawFastHLine(x + x_pos, y - y_pos, 2 * (-x_pos) + 1, color);
e2 = err; e2 = err;
if (e2 <= y_pos) { if (e2 <= y_pos)
{
err += ++y_pos * 2 + 1; err += ++y_pos * 2 + 1;
if(-x_pos == y_pos && e2 <= x_pos) { if (-x_pos == y_pos && e2 <= x_pos)
{
e2 = 0; e2 = 0;
} }
} }
if(e2 > x_pos) { if (e2 > x_pos)
{
err += ++x_pos * 2 + 1; err += ++x_pos * 2 + 1;
} }
} while (x_pos <= 0); } while (x_pos <= 0);
@ -632,7 +658,8 @@ void ssd1306_drawstr(uint8_t x, uint8_t y, char *str, uint8_t color)
/* /*
* enum for font size * enum for font size
*/ */
typedef enum { typedef enum
{
fontsize_8x8 = 1, fontsize_8x8 = 1,
fontsize_16x16 = 2, fontsize_16x16 = 2,
fontsize_32x32 = 4, fontsize_32x32 = 4,
@ -666,8 +693,10 @@ void ssd1306_drawchar_sz(uint8_t x, uint8_t y, uint8_t chr, uint8_t color, font_
col = (~color) & 1; col = (~color) & 1;
// Draw the pixel at the original size and scaled size using nested for-loops // Draw the pixel at the original size and scaled size using nested for-loops
for (uint8_t k = 0; k < font_scale; k++) { for (uint8_t k = 0; k < font_scale; k++)
for (uint8_t l = 0; l < font_scale; l++) { {
for (uint8_t l = 0; l < font_scale; l++)
{
ssd1306_drawPixel(x + (j * font_scale) + k, y + (i * font_scale) + l, col); ssd1306_drawPixel(x + (j * font_scale) + k, y + (i * font_scale) + l, col);
} }
} }

View file

@ -146,7 +146,8 @@ uint8_t ssd1306_i2c_send(uint8_t addr, uint8_t *data, uint8_t sz)
return 2; return 2;
// wait for previous packet to finish // wait for previous packet to finish
while(ssd1306_i2c_irq_state); while (ssd1306_i2c_irq_state)
;
#ifdef IRQ_DIAG #ifdef IRQ_DIAG
GPIOC->BSHR = (1 << (16 + 3)); GPIOC->BSHR = (1 << (16 + 3));
@ -160,7 +161,8 @@ uint8_t ssd1306_i2c_send(uint8_t addr, uint8_t *data, uint8_t sz)
// wait for not busy // wait for not busy
timeout = TIMEOUT_MAX; timeout = TIMEOUT_MAX;
while((I2C1->STAR2 & I2C_STAR2_BUSY) && (timeout--)); while ((I2C1->STAR2 & I2C_STAR2_BUSY) && (timeout--))
;
if (timeout == -1) if (timeout == -1)
return ssd1306_i2c_error(0); return ssd1306_i2c_error(0);
@ -169,7 +171,8 @@ uint8_t ssd1306_i2c_send(uint8_t addr, uint8_t *data, uint8_t sz)
// wait for master mode select // wait for master mode select
timeout = TIMEOUT_MAX; timeout = TIMEOUT_MAX;
while((!ssd1306_i2c_chk_evt(SSD1306_I2C_EVENT_MASTER_MODE_SELECT)) && (timeout--)); while ((!ssd1306_i2c_chk_evt(SSD1306_I2C_EVENT_MASTER_MODE_SELECT)) && (timeout--))
;
if (timeout == -1) if (timeout == -1)
return ssd1306_i2c_error(1); return ssd1306_i2c_error(1);
@ -178,7 +181,8 @@ uint8_t ssd1306_i2c_send(uint8_t addr, uint8_t *data, uint8_t sz)
// wait for transmit condition // wait for transmit condition
timeout = TIMEOUT_MAX; timeout = TIMEOUT_MAX;
while((!ssd1306_i2c_chk_evt(SSD1306_I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) && (timeout--)); while ((!ssd1306_i2c_chk_evt(SSD1306_I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) && (timeout--))
;
if (timeout == -1) if (timeout == -1)
return ssd1306_i2c_error(2); return ssd1306_i2c_error(2);
@ -227,7 +231,8 @@ void I2C1_EV_IRQHandler(void)
ssd1306_i2c_irq_state = 0; ssd1306_i2c_irq_state = 0;
// wait for tx complete // wait for tx complete
while(!ssd1306_i2c_chk_evt(SSD1306_I2C_EVENT_MASTER_BYTE_TRANSMITTED)); while (!ssd1306_i2c_chk_evt(SSD1306_I2C_EVENT_MASTER_BYTE_TRANSMITTED))
;
// set STOP condition // set STOP condition
I2C1->CTLR1 |= I2C_CTLR1_STOP; I2C1->CTLR1 |= I2C_CTLR1_STOP;
@ -248,7 +253,8 @@ uint8_t ssd1306_i2c_send(uint8_t addr, const uint8_t *data, int sz)
// wait for not busy // wait for not busy
timeout = TIMEOUT_MAX; timeout = TIMEOUT_MAX;
while((I2C1->STAR2 & I2C_STAR2_BUSY) && (timeout--)); while ((I2C1->STAR2 & I2C_STAR2_BUSY) && (timeout--))
;
if (timeout == -1) if (timeout == -1)
return ssd1306_i2c_error(0); return ssd1306_i2c_error(0);
@ -257,7 +263,8 @@ uint8_t ssd1306_i2c_send(uint8_t addr, const uint8_t *data, int sz)
// wait for master mode select // wait for master mode select
timeout = TIMEOUT_MAX; timeout = TIMEOUT_MAX;
while((!ssd1306_i2c_chk_evt(SSD1306_I2C_EVENT_MASTER_MODE_SELECT)) && (timeout--)); while ((!ssd1306_i2c_chk_evt(SSD1306_I2C_EVENT_MASTER_MODE_SELECT)) && (timeout--))
;
if (timeout == -1) if (timeout == -1)
return ssd1306_i2c_error(1); return ssd1306_i2c_error(1);
@ -266,7 +273,8 @@ uint8_t ssd1306_i2c_send(uint8_t addr, const uint8_t *data, int sz)
// wait for transmit condition // wait for transmit condition
timeout = TIMEOUT_MAX; timeout = TIMEOUT_MAX;
while((!ssd1306_i2c_chk_evt(SSD1306_I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) && (timeout--)); while ((!ssd1306_i2c_chk_evt(SSD1306_I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) && (timeout--))
;
if (timeout == -1) if (timeout == -1)
return ssd1306_i2c_error(2); return ssd1306_i2c_error(2);
@ -275,7 +283,8 @@ uint8_t ssd1306_i2c_send(uint8_t addr, const uint8_t *data, int sz)
{ {
// wait for TX Empty // wait for TX Empty
timeout = TIMEOUT_MAX; timeout = TIMEOUT_MAX;
while(!(I2C1->STAR1 & I2C_STAR1_TXE) && (timeout--)); while (!(I2C1->STAR1 & I2C_STAR1_TXE) && (timeout--))
;
if (timeout == -1) if (timeout == -1)
return ssd1306_i2c_error(3); return ssd1306_i2c_error(3);
@ -285,7 +294,8 @@ uint8_t ssd1306_i2c_send(uint8_t addr, const uint8_t *data, int sz)
// wait for tx complete // wait for tx complete
timeout = TIMEOUT_MAX; timeout = TIMEOUT_MAX;
while((!ssd1306_i2c_chk_evt(SSD1306_I2C_EVENT_MASTER_BYTE_TRANSMITTED)) && (timeout--)); while ((!ssd1306_i2c_chk_evt(SSD1306_I2C_EVENT_MASTER_BYTE_TRANSMITTED)) && (timeout--))
;
if (timeout == -1) if (timeout == -1)
return ssd1306_i2c_error(4); return ssd1306_i2c_error(4);

View file

@ -72,9 +72,13 @@ unsigned char ssd1306_i2c_sendbyte( unsigned char data )
{ {
I2CDELAY_FUNC(1 * I2CSPEEDBASE); I2CDELAY_FUNC(1 * I2CSPEEDBASE);
if (data & 0x80) if (data & 0x80)
{ SDA_HIGH; } {
SDA_HIGH;
}
else else
{ SDA_LOW; } {
SDA_LOW;
}
data <<= 1; data <<= 1;
I2CDELAY_FUNC(1 * I2CSPEEDBASE); I2CDELAY_FUNC(1 * I2CSPEEDBASE);
SCL_HIGH SCL_HIGH

View file

@ -93,7 +93,8 @@ uint8_t ssd1306_pkt_send(const uint8_t *data, int sz, uint8_t cmd)
while (sz--) while (sz--)
{ {
// wait for TXE // wait for TXE
while(!(SPI1->STATR & SPI_STATR_TXE)); while (!(SPI1->STATR & SPI_STATR_TXE))
;
// Send byte // Send byte
SPI1->DATAR = *data++; SPI1->DATAR = *data++;

View file

@ -37,12 +37,10 @@
#include <stdbool.h> #include <stdbool.h>
#include <stdint.h> #include <stdint.h>
/*------------------------------------------------------------------*/ /*------------------------------------------------------------------*/
/* From Linux /* From Linux
*------------------------------------------------------------------*/ *------------------------------------------------------------------*/
#define USB_DIR_OUT 0 /* to device */ #define USB_DIR_OUT 0 /* to device */
#define USB_DIR_IN 0x80 /* to host */ #define USB_DIR_IN 0x80 /* to host */
@ -52,7 +50,6 @@
#define USB_TYPE_VENDOR (0x02 << 5) #define USB_TYPE_VENDOR (0x02 << 5)
#define USB_TYPE_RESERVED (0x03 << 5) #define USB_TYPE_RESERVED (0x03 << 5)
/* /*
* USB recipients, the third of three bRequestType fields * USB recipients, the third of three bRequestType fields
*/ */
@ -88,11 +85,16 @@
#elif defined(__cplusplus) && __cplusplus >= 201103L #elif defined(__cplusplus) && __cplusplus >= 201103L
#define TU_VERIFY_STATIC static_assert #define TU_VERIFY_STATIC static_assert
#else #else
#define TU_VERIFY_STATIC(const_expr, _mess) enum { TU_XSTRCAT(_verify_static_, _TU_COUNTER_) = 1/(!!(const_expr)) } #define TU_VERIFY_STATIC(const_expr, _mess) \
enum \
{ \
TU_XSTRCAT(_verify_static_, _TU_COUNTER_) = 1 / (!!(const_expr)) \
}
#endif #endif
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C"
{
#endif #endif
/*------------------------------------------------------------------*/ /*------------------------------------------------------------------*/
@ -260,7 +262,8 @@ typedef enum
DEVICE_CAPABILITY_CONFIGURATION_SUMMARY = 0x10 DEVICE_CAPABILITY_CONFIGURATION_SUMMARY = 0x10
} device_capability_type_t; } device_capability_type_t;
enum { enum
{
TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP = TU_BIT(5), TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP = TU_BIT(5),
TUSB_DESC_CONFIG_ATT_SELF_POWERED = TU_BIT(6), TUSB_DESC_CONFIG_ATT_SELF_POWERED = TU_BIT(6),
}; };
@ -293,7 +296,6 @@ enum
INTERFACE_INVALID_NUMBER = 0xff INTERFACE_INVALID_NUMBER = 0xff
}; };
typedef enum typedef enum
{ {
MS_OS_20_SET_HEADER_DESCRIPTOR = 0x00, MS_OS_20_SET_HEADER_DESCRIPTOR = 0x00,
@ -388,14 +390,16 @@ typedef struct TU_ATTR_PACKED
uint8_t bEndpointAddress; ///< The address of the endpoint on the USB device described by this descriptor. The address is encoded as follows: \n Bit 3...0: The endpoint number \n Bit 6...4: Reserved, reset to zero \n Bit 7: Direction, ignored for control endpoints 0 = OUT endpoint 1 = IN endpoint. uint8_t bEndpointAddress; ///< The address of the endpoint on the USB device described by this descriptor. The address is encoded as follows: \n Bit 3...0: The endpoint number \n Bit 6...4: Reserved, reset to zero \n Bit 7: Direction, ignored for control endpoints 0 = OUT endpoint 1 = IN endpoint.
struct TU_ATTR_PACKED { struct TU_ATTR_PACKED
{
uint8_t xfer : 2; uint8_t xfer : 2;
uint8_t sync : 2; uint8_t sync : 2;
uint8_t usage : 2; uint8_t usage : 2;
uint8_t : 2; uint8_t : 2;
} bmAttributes; ///< This field describes the endpoint's attributes when it is configured using the bConfigurationValue. \n Bits 1..0: Transfer Type \n- 00 = Control \n- 01 = Isochronous \n- 10 = Bulk \n- 11 = Interrupt \n If not an isochronous endpoint, bits 5..2 are reserved and must be set to zero. If isochronous, they are defined as follows: \n Bits 3..2: Synchronization Type \n- 00 = No Synchronization \n- 01 = Asynchronous \n- 10 = Adaptive \n- 11 = Synchronous \n Bits 5..4: Usage Type \n- 00 = Data endpoint \n- 01 = Feedback endpoint \n- 10 = Implicit feedback Data endpoint \n- 11 = Reserved \n Refer to Chapter 5 of USB 2.0 specification for more information. \n All other bits are reserved and must be reset to zero. Reserved bits must be ignored by the host. } bmAttributes; ///< This field describes the endpoint's attributes when it is configured using the bConfigurationValue. \n Bits 1..0: Transfer Type \n- 00 = Control \n- 01 = Isochronous \n- 10 = Bulk \n- 11 = Interrupt \n If not an isochronous endpoint, bits 5..2 are reserved and must be set to zero. If isochronous, they are defined as follows: \n Bits 3..2: Synchronization Type \n- 00 = No Synchronization \n- 01 = Asynchronous \n- 10 = Adaptive \n- 11 = Synchronous \n Bits 5..4: Usage Type \n- 00 = Data endpoint \n- 01 = Feedback endpoint \n- 10 = Implicit feedback Data endpoint \n- 11 = Reserved \n Refer to Chapter 5 of USB 2.0 specification for more information. \n All other bits are reserved and must be reset to zero. Reserved bits must be ignored by the host.
struct TU_ATTR_PACKED { struct TU_ATTR_PACKED
{
uint16_t size : 11; ///< Maximum packet size this endpoint is capable of sending or receiving when this configuration is selected. \n For isochronous endpoints, this value is used to reserve the bus time in the schedule, required for the per-(micro)frame data payloads. The pipe may, on an ongoing basis, actually use less bandwidth than that reserved. The device reports, if necessary, the actual bandwidth used via its normal, non-USB defined mechanisms. \n For all endpoints, bits 10..0 specify the maximum packet size (in bytes). \n For high-speed isochronous and interrupt endpoints: \n Bits 12..11 specify the number of additional transaction opportunities per microframe: \n- 00 = None (1 transaction per microframe) \n- 01 = 1 additional (2 per microframe) \n- 10 = 2 additional (3 per microframe) \n- 11 = Reserved \n Bits 15..13 are reserved and must be set to zero. uint16_t size : 11; ///< Maximum packet size this endpoint is capable of sending or receiving when this configuration is selected. \n For isochronous endpoints, this value is used to reserve the bus time in the schedule, required for the per-(micro)frame data payloads. The pipe may, on an ongoing basis, actually use less bandwidth than that reserved. The device reports, if necessary, the actual bandwidth used via its normal, non-USB defined mechanisms. \n For all endpoints, bits 10..0 specify the maximum packet size (in bytes). \n For high-speed isochronous and interrupt endpoints: \n Bits 12..11 specify the number of additional transaction opportunities per microframe: \n- 00 = None (1 transaction per microframe) \n- 01 = 1 additional (2 per microframe) \n- 10 = 2 additional (3 per microframe) \n- 11 = Reserved \n Bits 15..13 are reserved and must be set to zero.
uint16_t hs_period_mult : 2; uint16_t hs_period_mult : 2;
uint16_t TU_RESERVED : 3; uint16_t TU_RESERVED : 3;
@ -480,9 +484,12 @@ typedef struct TU_ATTR_PACKED
/*------------------------------------------------------------------*/ /*------------------------------------------------------------------*/
/* Types /* Types
*------------------------------------------------------------------*/ *------------------------------------------------------------------*/
typedef struct TU_ATTR_PACKED{ typedef struct TU_ATTR_PACKED
union { {
struct TU_ATTR_PACKED { union
{
struct TU_ATTR_PACKED
{
uint8_t recipient : 5; ///< Recipient type tusb_request_recipient_t. uint8_t recipient : 5; ///< Recipient type tusb_request_recipient_t.
uint8_t type : 2; ///< Request type tusb_request_type_t. uint8_t type : 2; ///< Request type tusb_request_type_t.
uint8_t direction : 1; ///< Direction type. tusb_dir_t uint8_t direction : 1; ///< Direction type. tusb_dir_t
@ -549,11 +556,11 @@ static inline uint8_t tu_desc_len(void const* desc)
} }
#endif #endif
// from tinyusb_hid.h // from tinyusb_hid.h
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C"
{
#endif #endif
#define TU_U16_HIGH(u16) ((uint8_t)(((u16) >> 8) & 0x00ff)) #define TU_U16_HIGH(u16) ((uint8_t)(((u16) >> 8) & 0x00ff))
@ -752,7 +759,6 @@ static inline uint8_t tu_desc_len(void const* desc)
#define DEF_STRING_DESC_PROD 0x02 #define DEF_STRING_DESC_PROD 0x02
#define DEF_STRING_DESC_SERN 0x03 #define DEF_STRING_DESC_SERN 0x03
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// Common Definitions // Common Definitions
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
@ -1238,7 +1244,6 @@ typedef enum
#define HID_KEY_ALT_RIGHT 0xE6 #define HID_KEY_ALT_RIGHT 0xE6
#define HID_KEY_GUI_RIGHT 0xE7 #define HID_KEY_GUI_RIGHT 0xE7
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// REPORT DESCRIPTOR // REPORT DESCRIPTOR
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
@ -1291,7 +1296,8 @@ typedef enum
#define HID_BUFFERED_BYTES (1 << 8) #define HID_BUFFERED_BYTES (1 << 8)
//------------- COLLECTION ITEM 6.2.2.6 -------------// //------------- COLLECTION ITEM 6.2.2.6 -------------//
enum { enum
{
HID_COLLECTION_PHYSICAL = 0, HID_COLLECTION_PHYSICAL = 0,
HID_COLLECTION_APPLICATION, HID_COLLECTION_APPLICATION,
HID_COLLECTION_LOGICAL, HID_COLLECTION_LOGICAL,
@ -1350,7 +1356,8 @@ enum {
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
/// HID Usage Table - Table 1: Usage Page Summary /// HID Usage Table - Table 1: Usage Page Summary
enum { enum
{
HID_USAGE_PAGE_DESKTOP = 0x01, HID_USAGE_PAGE_DESKTOP = 0x01,
HID_USAGE_PAGE_SIMULATE = 0x02, HID_USAGE_PAGE_SIMULATE = 0x02,
HID_USAGE_PAGE_VIRTUAL_REALITY = 0x03, HID_USAGE_PAGE_VIRTUAL_REALITY = 0x03,
@ -1379,7 +1386,8 @@ enum {
}; };
/// HID Usage Table - Table 6: Generic Desktop Page /// HID Usage Table - Table 6: Generic Desktop Page
enum { enum
{
HID_USAGE_DESKTOP_POINTER = 0x01, HID_USAGE_DESKTOP_POINTER = 0x01,
HID_USAGE_DESKTOP_MOUSE = 0x02, HID_USAGE_DESKTOP_MOUSE = 0x02,
HID_USAGE_DESKTOP_JOYSTICK = 0x04, HID_USAGE_DESKTOP_JOYSTICK = 0x04,
@ -1451,7 +1459,6 @@ enum {
HID_USAGE_DESKTOP_SYSTEM_DISPLAY_LCD_AUTOSCALE = 0xB7 HID_USAGE_DESKTOP_SYSTEM_DISPLAY_LCD_AUTOSCALE = 0xB7
}; };
/// HID Usage Table: Consumer Page (0x0C) /// HID Usage Table: Consumer Page (0x0C)
/// Only contains controls that supported by Windows (whole list is too long) /// Only contains controls that supported by Windows (whole list is too long)
enum enum
@ -1658,7 +1665,9 @@ enum
{1, HID_KEY_BACKSLASH}, /* 0x7C | */ \ {1, HID_KEY_BACKSLASH}, /* 0x7C | */ \
{1, HID_KEY_BRACKET_RIGHT}, /* 0x7D } */ \ {1, HID_KEY_BRACKET_RIGHT}, /* 0x7D } */ \
{1, HID_KEY_GRAVE}, /* 0x7E ~ */ \ {1, HID_KEY_GRAVE}, /* 0x7E ~ */ \
{0, HID_KEY_DELETE } /* 0x7F Delete */ \ { \
0, HID_KEY_DELETE \
} /* 0x7F Delete */
/*-------------------------------------------------------------------- /*--------------------------------------------------------------------
* KEYCODE to Ascii Conversion * KEYCODE to Ascii Conversion
@ -1774,17 +1783,10 @@ enum
{'9', 0}, /* 0x61 */ \ {'9', 0}, /* 0x61 */ \
{'0', 0}, /* 0x62 */ \ {'0', 0}, /* 0x62 */ \
{'0', 0}, /* 0x63 */ \ {'0', 0}, /* 0x63 */ \
{'=' , '=' }, /* 0x67 */ \ {'=', '='}, /* 0x67 */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* _TUSB_TYPES_H_ */ #endif /* _TUSB_TYPES_H_ */

View file

@ -65,10 +65,23 @@ static volatile int WS2812BLEDInUse;
static void WS2812FillBuffSec(uint16_t *ptr, int numhalfwords, int tce) static void WS2812FillBuffSec(uint16_t *ptr, int numhalfwords, int tce)
{ {
const static uint16_t bitquartets[16] = { const static uint16_t bitquartets[16] = {
0b1000100010001000, 0b1000100010001110, 0b1000100011101000, 0b1000100011101110, 0b1000100010001000,
0b1000111010001000, 0b1000111010001110, 0b1000111011101000, 0b1000111011101110, 0b1000100010001110,
0b1110100010001000, 0b1110100010001110, 0b1110100011101000, 0b1110100011101110, 0b1000100011101000,
0b1110111010001000, 0b1110111010001110, 0b1110111011101000, 0b1110111011101110, }; 0b1000100011101110,
0b1000111010001000,
0b1000111010001110,
0b1000111011101000,
0b1000111011101110,
0b1110100010001000,
0b1110100010001110,
0b1110100011101000,
0b1110100011101110,
0b1110111010001000,
0b1110111010001110,
0b1110111011101000,
0b1110111011101110,
};
int i; int i;
uint16_t *end = ptr + numhalfwords; uint16_t *end = ptr + numhalfwords;
@ -167,7 +180,6 @@ static void WS2812FillBuffSec( uint16_t * ptr, int numhalfwords, int tce )
ptr += 6; ptr += 6;
i += 6; i += 6;
#endif #endif
} }
WS2812LEDPlace = place; WS2812LEDPlace = place;
} }
@ -272,4 +284,3 @@ void WS2812BDMAInit( )
#endif #endif
#endif #endif

View file

@ -80,4 +80,3 @@ void WS2812BSimpleSend( GPIO_TypeDef * port, int pin, uint8_t * data, int len_in
#endif #endif
#endif #endif

View file

@ -0,0 +1,5 @@
{
"DisableFormat": true,
"SortIncludes": "Never"
}

View file

@ -1,7 +1,7 @@
#include <stdio.h>
#include <stdint.h> #include <stdint.h>
#include <string.h> #include <stdio.h>
#include <stdlib.h> #include <stdlib.h>
#include <string.h>
const char *yes[] = {"SENTINEL_WILL_BE_REPLACED_BY_CMDLINE"}; // "CH32X03x", etc. element 0 is filled in by command-line const char *yes[] = {"SENTINEL_WILL_BE_REPLACED_BY_CMDLINE"}; // "CH32X03x", etc. element 0 is filled in by command-line
const char *no[] = {"CH32V10x", "CH32V30x", "CH32V20x", "CH32X03x", "CH32V003"}; const char *no[] = {"CH32V10x", "CH32V30x", "CH32V20x", "CH32X03x", "CH32V003"};
@ -10,9 +10,16 @@ char * WhitePull( const char ** sti )
{ {
const char *st = *sti; const char *st = *sti;
int len = 0; int len = 0;
while( ( *st == ' ' || *st == '\t' || *st == '(' ) && *st ) { st++; } while ((*st == ' ' || *st == '\t' || *st == '(') && *st)
{
st++;
}
const char *sts = st; const char *sts = st;
while( *st != ' ' && *st != '\t' && *st != '\n' && *st != ')' && *st != '(' && *st != 0 ) { st++; len++; } while (*st != ' ' && *st != '\t' && *st != '\n' && *st != ')' && *st != '(' && *st != 0)
{
st++;
len++;
}
if (*st == ')') { st++; } if (*st == ')') { st++; }
char *ret = malloc(len + 1); char *ret = malloc(len + 1);
memcpy(ret, sts, len); memcpy(ret, sts, len);
@ -69,9 +76,18 @@ cont:
lastv = ret; lastv = ret;
lasto = -1; lasto = -1;
// printf( "RET: %d\n", ret ); // printf( "RET: %d\n", ret );
if( strcmp( wpa, "||" ) == 0 ) { lasto = 1; goto cont; } if (strcmp(wpa, "||") == 0)
else if( strcmp( wpa, "&&" ) == 0 ) { lasto = 2; goto cont; } {
else return ret; lasto = 1;
goto cont;
}
else if (strcmp(wpa, "&&") == 0)
{
lasto = 2;
goto cont;
}
else
return ret;
} }
// 0 for no // 0 for no
@ -111,9 +127,14 @@ int NoYesInd( const char * preprocc )
const char *sslineis(const char *line, const char *match) const char *sslineis(const char *line, const char *match)
{ {
while( *line == ' ' || *line == '\t' ) line++; while (*line == ' ' || *line == '\t')
line++;
const char *linestart = line; const char *linestart = line;
while( *line && *match == *line ) { line++; match++; } while (*line && *match == *line)
{
line++;
match++;
}
if (*match == 0) if (*match == 0)
return linestart; return linestart;
else else
@ -144,7 +165,6 @@ int main( int argc, char ** argv )
char line[1024]; char line[1024];
char *l; char *l;
int depth = 0; int depth = 0;
// 0 = no // 0 = no
@ -222,5 +242,3 @@ int main( int argc, char ** argv )
} }
} }
} }

View file

@ -1,11 +0,0 @@
This only works for the WCH LinkE in RISC-V mode. If your programmer has the BLUE light ON shortly after boot your programmer is in ARM mode.
Please follow instructions here to convert your programmer to RISC-V mode from ARM mode.
Basically press-and-hold the ModeS button while plugging in the USB.
Once powered, it will store that to default.
The blue light should be OFF.
Once you are in RISC-V mode, you can install this driver by right-clicking on the driver and saying install.

View file

@ -1,23 +0,0 @@
all : ci
EXAMPLES := $(wildcard ../../examples/*/.) $(wildcard ../../examples_v10x/*/.) $(wildcard ../../examples_v20x/*/.) $(wildcard ../../examples_v30x/*/.) $(wildcard ../../examples_x035/*/.)
.PHONY: ci tests all $(EXAMPLES) clean
results :
mkdir -p results
$(EXAMPLES) : results
echo $(shell basename $(realpath $(lastword $@)))
($(MAKE) -C $@ build > results/$(subst .,,$(subst /,_,$@)).txt 2> results/$(subst .,,$(subst /,_,$@)).warning && echo "success" > results/$(subst .,,$(subst /,_,$@)).result) || echo "failure" > results/$(subst .,,$(subst /,_,$@)).result
echo $(shell basename $(realpath $(lastword $@))).bin > results/$(subst .,,$(subst /,_,$@)).stat
sha1sum $@/$(shell basename $(realpath $(lastword $@))).bin | cut -d' ' -f 1 >> results/$(subst .,,$(subst /,_,$@)).stat
wc --bytes $@/$(shell basename $(realpath $(lastword $@))).bin | cut -d' ' -f 1 >> results/$(subst .,,$(subst /,_,$@)).stat
tests : $(EXAMPLES)
ci : install tests
clean :
rm -rf results